1 /******************************************************************************
3 * Copyright(c) 2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 *****************************************************************************/
25 /**************************************************************
28 * This file is for RTL8192E Co-exist mechanism
31 * 2012/11/15 Cosa first check in.
33 **************************************************************/
35 /**************************************************************
37 **************************************************************/
38 #include "halbt_precomp.h"
39 /**************************************************************
40 * Global variables, these are static variables
41 **************************************************************/
42 static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
43 static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
44 static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
45 static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
47 static const char *const GLBtInfoSrc8192e2Ant[] = {
50 "BT Info[bt auto report]",
53 static u32 glcoex_ver_date_8192e_2ant = 20130902;
54 static u32 glcoex_ver_8192e_2ant = 0x34;
56 /**************************************************************
57 * local function proto type if needed
58 **************************************************************/
59 /**************************************************************
60 * local function start with halbtc8192e2ant_
61 **************************************************************/
62 static u8 halbtc8192e2ant_btrssi_state(u8 level_num, u8 rssi_thresh,
66 u8 btrssi_state = coex_sta->pre_bt_rssi_state;
68 btrssi = coex_sta->bt_rssi;
71 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
72 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
73 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
74 "BT Rssi pre state = LOW\n");
75 if (btrssi >= (rssi_thresh +
76 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
77 btrssi_state = BTC_RSSI_STATE_HIGH;
78 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
79 "BT Rssi state switch to High\n");
81 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
82 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
83 "BT Rssi state stay at Low\n");
86 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
87 "BT Rssi pre state = HIGH\n");
88 if (btrssi < rssi_thresh) {
89 btrssi_state = BTC_RSSI_STATE_LOW;
90 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
91 "BT Rssi state switch to Low\n");
93 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
94 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
95 "BT Rssi state stay at High\n");
98 } else if (level_num == 3) {
99 if (rssi_thresh > rssi_thresh1) {
100 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
101 "BT Rssi thresh error!!\n");
102 return coex_sta->pre_bt_rssi_state;
105 if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
106 (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
107 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
108 "BT Rssi pre state = LOW\n");
109 if (btrssi >= (rssi_thresh +
110 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
111 btrssi_state = BTC_RSSI_STATE_MEDIUM;
112 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
113 "BT Rssi state switch to Medium\n");
115 btrssi_state = BTC_RSSI_STATE_STAY_LOW;
116 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
117 "BT Rssi state stay at Low\n");
119 } else if ((coex_sta->pre_bt_rssi_state ==
120 BTC_RSSI_STATE_MEDIUM) ||
121 (coex_sta->pre_bt_rssi_state ==
122 BTC_RSSI_STATE_STAY_MEDIUM)) {
123 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
124 "[BTCoex], BT Rssi pre state = MEDIUM\n");
125 if (btrssi >= (rssi_thresh1 +
126 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
127 btrssi_state = BTC_RSSI_STATE_HIGH;
128 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
129 "BT Rssi state switch to High\n");
130 } else if (btrssi < rssi_thresh) {
131 btrssi_state = BTC_RSSI_STATE_LOW;
132 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
133 "BT Rssi state switch to Low\n");
135 btrssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
136 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
137 "BT Rssi state stay at Medium\n");
140 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
141 "BT Rssi pre state = HIGH\n");
142 if (btrssi < rssi_thresh1) {
143 btrssi_state = BTC_RSSI_STATE_MEDIUM;
144 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
145 "BT Rssi state switch to Medium\n");
147 btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
148 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
149 "BT Rssi state stay at High\n");
154 coex_sta->pre_bt_rssi_state = btrssi_state;
159 static u8 halbtc8192e2ant_wifirssi_state(struct btc_coexist *btcoexist,
160 u8 index, u8 level_num, u8 rssi_thresh,
164 u8 wifirssi_state = coex_sta->pre_wifi_rssi_state[index];
166 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
168 if (level_num == 2) {
169 if ((coex_sta->pre_wifi_rssi_state[index] ==
170 BTC_RSSI_STATE_LOW) ||
171 (coex_sta->pre_wifi_rssi_state[index] ==
172 BTC_RSSI_STATE_STAY_LOW)) {
173 if (wifirssi >= (rssi_thresh +
174 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
175 wifirssi_state = BTC_RSSI_STATE_HIGH;
176 BTC_PRINT(BTC_MSG_ALGORITHM,
177 ALGO_WIFI_RSSI_STATE,
178 "wifi RSSI state switch to High\n");
180 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
181 BTC_PRINT(BTC_MSG_ALGORITHM,
182 ALGO_WIFI_RSSI_STATE,
183 "wifi RSSI state stay at Low\n");
186 if (wifirssi < rssi_thresh) {
187 wifirssi_state = BTC_RSSI_STATE_LOW;
188 BTC_PRINT(BTC_MSG_ALGORITHM,
189 ALGO_WIFI_RSSI_STATE,
190 "wifi RSSI state switch to Low\n");
192 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
193 BTC_PRINT(BTC_MSG_ALGORITHM,
194 ALGO_WIFI_RSSI_STATE,
195 "wifi RSSI state stay at High\n");
198 } else if (level_num == 3) {
199 if (rssi_thresh > rssi_thresh1) {
200 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE,
201 "wifi RSSI thresh error!!\n");
202 return coex_sta->pre_wifi_rssi_state[index];
205 if ((coex_sta->pre_wifi_rssi_state[index] ==
206 BTC_RSSI_STATE_LOW) ||
207 (coex_sta->pre_wifi_rssi_state[index] ==
208 BTC_RSSI_STATE_STAY_LOW)) {
209 if (wifirssi >= (rssi_thresh +
210 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
211 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
212 BTC_PRINT(BTC_MSG_ALGORITHM,
213 ALGO_WIFI_RSSI_STATE,
214 "wifi RSSI state switch to Medium\n");
216 wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
217 BTC_PRINT(BTC_MSG_ALGORITHM,
218 ALGO_WIFI_RSSI_STATE,
219 "wifi RSSI state stay at Low\n");
221 } else if ((coex_sta->pre_wifi_rssi_state[index] ==
222 BTC_RSSI_STATE_MEDIUM) ||
223 (coex_sta->pre_wifi_rssi_state[index] ==
224 BTC_RSSI_STATE_STAY_MEDIUM)) {
225 if (wifirssi >= (rssi_thresh1 +
226 BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
227 wifirssi_state = BTC_RSSI_STATE_HIGH;
228 BTC_PRINT(BTC_MSG_ALGORITHM,
229 ALGO_WIFI_RSSI_STATE,
230 "wifi RSSI state switch to High\n");
231 } else if (wifirssi < rssi_thresh) {
232 wifirssi_state = BTC_RSSI_STATE_LOW;
233 BTC_PRINT(BTC_MSG_ALGORITHM,
234 ALGO_WIFI_RSSI_STATE,
235 "wifi RSSI state switch to Low\n");
237 wifirssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
238 BTC_PRINT(BTC_MSG_ALGORITHM,
239 ALGO_WIFI_RSSI_STATE,
240 "wifi RSSI state stay at Medium\n");
243 if (wifirssi < rssi_thresh1) {
244 wifirssi_state = BTC_RSSI_STATE_MEDIUM;
245 BTC_PRINT(BTC_MSG_ALGORITHM,
246 ALGO_WIFI_RSSI_STATE,
247 "wifi RSSI state switch to Medium\n");
249 wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
250 BTC_PRINT(BTC_MSG_ALGORITHM,
251 ALGO_WIFI_RSSI_STATE,
252 "wifi RSSI state stay at High\n");
257 coex_sta->pre_wifi_rssi_state[index] = wifirssi_state;
259 return wifirssi_state;
262 static void btc8192e2ant_monitor_bt_enable_dis(struct btc_coexist *btcoexist)
264 static bool pre_bt_disabled;
265 static u32 bt_disable_cnt;
266 bool bt_active = true, bt_disabled = false;
268 /* This function check if bt is disabled */
270 if (coex_sta->high_priority_tx == 0 &&
271 coex_sta->high_priority_rx == 0 &&
272 coex_sta->low_priority_tx == 0 &&
273 coex_sta->low_priority_rx == 0)
276 if (coex_sta->high_priority_tx == 0xffff &&
277 coex_sta->high_priority_rx == 0xffff &&
278 coex_sta->low_priority_tx == 0xffff &&
279 coex_sta->low_priority_rx == 0xffff)
285 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
287 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
288 "[BTCoex], BT is enabled !!\n");
291 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
292 "[BTCoex], bt all counters = 0, %d times!!\n",
294 if (bt_disable_cnt >= 2) {
296 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
298 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
299 "[BTCoex], BT is disabled !!\n");
302 if (pre_bt_disabled != bt_disabled) {
303 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
304 "[BTCoex], BT is from %s to %s!!\n",
305 (pre_bt_disabled ? "disabled" : "enabled"),
306 (bt_disabled ? "disabled" : "enabled"));
307 pre_bt_disabled = bt_disabled;
311 static u32 halbtc8192e2ant_decidera_mask(struct btc_coexist *btcoexist,
312 u8 sstype, u32 ra_masktype)
314 u32 disra_mask = 0x0;
316 switch (ra_masktype) {
317 case 0: /* normal mode */
319 disra_mask = 0x0; /* enable 2ss */
321 disra_mask = 0xfff00000;/* disable 2ss */
323 case 1: /* disable cck 1/2 */
325 disra_mask = 0x00000003;/* enable 2ss */
327 disra_mask = 0xfff00003;/* disable 2ss */
329 case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
331 disra_mask = 0x0001f1f7;/* enable 2ss */
333 disra_mask = 0xfff1f1f7;/* disable 2ss */
342 static void halbtc8192e2ant_Updatera_mask(struct btc_coexist *btcoexist,
343 bool force_exec, u32 dis_ratemask)
345 coex_dm->curra_mask = dis_ratemask;
347 if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
348 btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
349 &coex_dm->curra_mask);
350 coex_dm->prera_mask = coex_dm->curra_mask;
353 static void btc8192e2ant_autorate_fallback_retry(struct btc_coexist *btcoexist,
354 bool force_exec, u8 type)
356 bool wifi_under_bmode = false;
358 coex_dm->cur_arfrtype = type;
360 if (force_exec || (coex_dm->pre_arfrtype != coex_dm->cur_arfrtype)) {
361 switch (coex_dm->cur_arfrtype) {
362 case 0: /* normal mode */
363 btcoexist->btc_write_4byte(btcoexist, 0x430,
364 coex_dm->backup_arfr_cnt1);
365 btcoexist->btc_write_4byte(btcoexist, 0x434,
366 coex_dm->backup_arfr_cnt2);
369 btcoexist->btc_get(btcoexist,
370 BTC_GET_BL_WIFI_UNDER_B_MODE,
372 if (wifi_under_bmode) {
373 btcoexist->btc_write_4byte(btcoexist, 0x430,
375 btcoexist->btc_write_4byte(btcoexist, 0x434,
378 btcoexist->btc_write_4byte(btcoexist, 0x430,
380 btcoexist->btc_write_4byte(btcoexist, 0x434,
389 coex_dm->pre_arfrtype = coex_dm->cur_arfrtype;
392 static void halbtc8192e2ant_retrylimit(struct btc_coexist *btcoexist,
393 bool force_exec, u8 type)
395 coex_dm->cur_retrylimit_type = type;
397 if (force_exec || (coex_dm->pre_retrylimit_type !=
398 coex_dm->cur_retrylimit_type)) {
399 switch (coex_dm->cur_retrylimit_type) {
400 case 0: /* normal mode */
401 btcoexist->btc_write_2byte(btcoexist, 0x42a,
402 coex_dm->backup_retrylimit);
404 case 1: /* retry limit = 8 */
405 btcoexist->btc_write_2byte(btcoexist, 0x42a,
413 coex_dm->pre_retrylimit_type = coex_dm->cur_retrylimit_type;
416 static void halbtc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
417 bool force_exec, u8 type)
419 coex_dm->cur_ampdutime_type = type;
421 if (force_exec || (coex_dm->pre_ampdutime_type !=
422 coex_dm->cur_ampdutime_type)) {
423 switch (coex_dm->cur_ampdutime_type) {
424 case 0: /* normal mode */
425 btcoexist->btc_write_1byte(btcoexist, 0x456,
426 coex_dm->backup_ampdu_maxtime);
428 case 1: /* AMPDU timw = 0x38 * 32us */
429 btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
436 coex_dm->pre_ampdutime_type = coex_dm->cur_ampdutime_type;
439 static void halbtc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
440 bool force_exec, u8 ra_masktype,
441 u8 arfr_type, u8 retrylimit_type,
444 u32 disra_mask = 0x0;
446 coex_dm->curra_masktype = ra_masktype;
447 disra_mask = halbtc8192e2ant_decidera_mask(btcoexist,
450 halbtc8192e2ant_Updatera_mask(btcoexist, force_exec, disra_mask);
451 btc8192e2ant_autorate_fallback_retry(btcoexist, force_exec, arfr_type);
452 halbtc8192e2ant_retrylimit(btcoexist, force_exec, retrylimit_type);
453 halbtc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdutime_type);
456 static void halbtc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
457 bool force_exec, bool rej_ap_agg_pkt,
458 bool bt_ctrl_agg_buf_size,
461 bool reject_rx_agg = rej_ap_agg_pkt;
462 bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
463 u8 rx_agg_size = agg_buf_size;
465 /*********************************************
466 * Rx Aggregation related setting
467 *********************************************/
468 btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
470 /* decide BT control aggregation buf size or not */
471 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
472 &bt_ctrl_rx_agg_size);
473 /* aggregation buf size, only work
474 * when BT control Rx aggregation size.
476 btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
477 /* real update aggregation setting */
478 btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
481 static void halbtc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
483 u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
484 u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
489 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
490 reg_hp_tx = u32tmp & MASKLWORD;
491 reg_hp_rx = (u32tmp & MASKHWORD)>>16;
493 u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
494 reg_lp_tx = u32tmp & MASKLWORD;
495 reg_lp_rx = (u32tmp & MASKHWORD)>>16;
497 coex_sta->high_priority_tx = reg_hp_tx;
498 coex_sta->high_priority_rx = reg_hp_rx;
499 coex_sta->low_priority_tx = reg_lp_tx;
500 coex_sta->low_priority_rx = reg_lp_rx;
502 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
503 "[BTCoex] High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
504 reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
505 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
506 "[BTCoex] Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
507 reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
510 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
513 static void halbtc8192e2ant_querybt_info(struct btc_coexist *btcoexist)
515 u8 h2c_parameter[1] = {0};
517 coex_sta->c2h_bt_info_req_sent = true;
519 h2c_parameter[0] |= BIT0; /* trigger */
521 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
522 "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
525 btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
528 static void halbtc8192e2ant_update_btlink_info(struct btc_coexist *btcoexist)
530 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
531 bool bt_hson = false;
533 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
535 bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
536 bt_link_info->sco_exist = coex_sta->sco_exist;
537 bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
538 bt_link_info->pan_exist = coex_sta->pan_exist;
539 bt_link_info->hid_exist = coex_sta->hid_exist;
541 /* work around for HS mode. */
543 bt_link_info->pan_exist = true;
544 bt_link_info->bt_link_exist = true;
547 /* check if Sco only */
548 if (bt_link_info->sco_exist &&
549 !bt_link_info->a2dp_exist &&
550 !bt_link_info->pan_exist &&
551 !bt_link_info->hid_exist)
552 bt_link_info->sco_only = true;
554 bt_link_info->sco_only = false;
556 /* check if A2dp only */
557 if (!bt_link_info->sco_exist &&
558 bt_link_info->a2dp_exist &&
559 !bt_link_info->pan_exist &&
560 !bt_link_info->hid_exist)
561 bt_link_info->a2dp_only = true;
563 bt_link_info->a2dp_only = false;
565 /* check if Pan only */
566 if (!bt_link_info->sco_exist &&
567 !bt_link_info->a2dp_exist &&
568 bt_link_info->pan_exist &&
569 !bt_link_info->hid_exist)
570 bt_link_info->pan_only = true;
572 bt_link_info->pan_only = false;
574 /* check if Hid only */
575 if (!bt_link_info->sco_exist &&
576 !bt_link_info->a2dp_exist &&
577 !bt_link_info->pan_exist &&
578 bt_link_info->hid_exist)
579 bt_link_info->hid_only = true;
581 bt_link_info->hid_only = false;
584 static u8 halbtc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
586 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
587 struct btc_stack_info *stack_info = &btcoexist->stack_info;
588 bool bt_hson = false;
589 u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
590 u8 numdiffprofile = 0;
592 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
594 if (!bt_link_info->bt_link_exist) {
595 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
596 "No BT link exists!!!\n");
600 if (bt_link_info->sco_exist)
602 if (bt_link_info->hid_exist)
604 if (bt_link_info->pan_exist)
606 if (bt_link_info->a2dp_exist)
609 if (numdiffprofile == 1) {
610 if (bt_link_info->sco_exist) {
611 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
613 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
615 if (bt_link_info->hid_exist) {
616 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
618 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
619 } else if (bt_link_info->a2dp_exist) {
620 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
622 algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
623 } else if (bt_link_info->pan_exist) {
625 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
628 BT_8192E_2ANT_COEX_ALGO_PANHS;
630 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
633 BT_8192E_2ANT_COEX_ALGO_PANEDR;
637 } else if (numdiffprofile == 2) {
638 if (bt_link_info->sco_exist) {
639 if (bt_link_info->hid_exist) {
640 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
642 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
643 } else if (bt_link_info->a2dp_exist) {
644 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
645 "SCO + A2DP ==> SCO\n");
646 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
647 } else if (bt_link_info->pan_exist) {
649 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
651 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
653 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
656 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
660 if (bt_link_info->hid_exist &&
661 bt_link_info->a2dp_exist) {
662 if (stack_info->num_of_hid >= 2) {
663 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
666 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
668 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
671 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
673 } else if (bt_link_info->hid_exist &&
674 bt_link_info->pan_exist) {
676 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
678 algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
680 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
683 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
685 } else if (bt_link_info->pan_exist &&
686 bt_link_info->a2dp_exist) {
688 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
691 BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
693 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
694 "A2DP + PAN(EDR)\n");
696 BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
700 } else if (numdiffprofile == 3) {
701 if (bt_link_info->sco_exist) {
702 if (bt_link_info->hid_exist &&
703 bt_link_info->a2dp_exist) {
704 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
705 "SCO + HID + A2DP ==> HID\n");
706 algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
707 } else if (bt_link_info->hid_exist &&
708 bt_link_info->pan_exist) {
710 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
711 "SCO + HID + PAN(HS)\n");
712 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
714 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
715 "SCO + HID + PAN(EDR)\n");
717 BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
719 } else if (bt_link_info->pan_exist &&
720 bt_link_info->a2dp_exist) {
722 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
723 "SCO + A2DP + PAN(HS)\n");
724 algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
726 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
727 "SCO + A2DP + PAN(EDR)\n");
729 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
733 if (bt_link_info->hid_exist &&
734 bt_link_info->pan_exist &&
735 bt_link_info->a2dp_exist) {
737 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
738 "HID + A2DP + PAN(HS)\n");
740 BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
742 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
743 "HID + A2DP + PAN(EDR)\n");
745 BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
749 } else if (numdiffprofile >= 3) {
750 if (bt_link_info->sco_exist) {
751 if (bt_link_info->hid_exist &&
752 bt_link_info->pan_exist &&
753 bt_link_info->a2dp_exist) {
755 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
756 "ErrorSCO+HID+A2DP+PAN(HS)\n");
759 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
760 "SCO+HID+A2DP+PAN(EDR)\n");
762 BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
771 static void halbtc8192e2ant_setfw_dac_swinglevel(struct btc_coexist *btcoexist,
774 u8 h2c_parameter[1] = {0};
776 /* There are several type of dacswing
777 * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
779 h2c_parameter[0] = dac_swinglvl;
781 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
782 "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swinglvl);
783 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
784 "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]);
786 btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
789 static void halbtc8192e2ant_set_fwdec_btpwr(struct btc_coexist *btcoexist,
792 u8 h2c_parameter[1] = {0};
794 h2c_parameter[0] = dec_btpwr_lvl;
796 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
797 "[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n",
798 dec_btpwr_lvl, h2c_parameter[0]);
800 btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
803 static void halbtc8192e2ant_dec_btpwr(struct btc_coexist *btcoexist,
804 bool force_exec, u8 dec_btpwr_lvl)
806 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
807 "[BTCoex], %s Dec BT power level = %d\n",
808 (force_exec ? "force to" : ""), dec_btpwr_lvl);
809 coex_dm->cur_dec_bt_pwr = dec_btpwr_lvl;
812 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
813 "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
814 coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
816 halbtc8192e2ant_set_fwdec_btpwr(btcoexist, coex_dm->cur_dec_bt_pwr);
818 coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
821 static void halbtc8192e2ant_set_bt_autoreport(struct btc_coexist *btcoexist,
822 bool enable_autoreport)
824 u8 h2c_parameter[1] = {0};
826 h2c_parameter[0] = 0;
828 if (enable_autoreport)
829 h2c_parameter[0] |= BIT0;
831 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
832 "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
833 (enable_autoreport ? "Enabled!!" : "Disabled!!"),
836 btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
839 static void halbtc8192e2ant_bt_autoreport(struct btc_coexist *btcoexist,
841 bool enable_autoreport)
843 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
844 "[BTCoex], %s BT Auto report = %s\n",
845 (force_exec ? "force to" : ""),
846 ((enable_autoreport) ? "Enabled" : "Disabled"));
847 coex_dm->cur_bt_auto_report = enable_autoreport;
850 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
851 "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
852 coex_dm->pre_bt_auto_report,
853 coex_dm->cur_bt_auto_report);
855 if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
858 halbtc8192e2ant_set_bt_autoreport(btcoexist,
859 coex_dm->cur_bt_auto_report);
861 coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
864 static void halbtc8192e2ant_fw_dac_swinglvl(struct btc_coexist *btcoexist,
865 bool force_exec, u8 fw_dac_swinglvl)
867 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
868 "[BTCoex], %s set FW Dac Swing level = %d\n",
869 (force_exec ? "force to" : ""), fw_dac_swinglvl);
870 coex_dm->cur_fw_dac_swing_lvl = fw_dac_swinglvl;
873 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
874 "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
875 coex_dm->pre_fw_dac_swing_lvl,
876 coex_dm->cur_fw_dac_swing_lvl);
878 if (coex_dm->pre_fw_dac_swing_lvl ==
879 coex_dm->cur_fw_dac_swing_lvl)
883 halbtc8192e2ant_setfw_dac_swinglevel(btcoexist,
884 coex_dm->cur_fw_dac_swing_lvl);
886 coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
889 static void btc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
890 bool rx_rf_shrink_on)
892 if (rx_rf_shrink_on) {
893 /* Shrink RF Rx LPF corner */
894 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
895 "[BTCoex], Shrink RF Rx LPF corner!!\n");
896 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
899 /* Resume RF Rx LPF corner
900 * After initialized, we can use coex_dm->btRf0x1eBackup
902 if (btcoexist->initilized) {
903 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
904 "[BTCoex], Resume RF Rx LPF corner!!\n");
905 btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
907 coex_dm->bt_rf0x1e_backup);
912 static void halbtc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
913 bool force_exec, bool rx_rf_shrink_on)
915 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
916 "[BTCoex], %s turn Rx RF Shrink = %s\n",
917 (force_exec ? "force to" : ""),
918 ((rx_rf_shrink_on) ? "ON" : "OFF"));
919 coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
922 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
923 "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n",
924 coex_dm->pre_rf_rx_lpf_shrink,
925 coex_dm->cur_rf_rx_lpf_shrink);
927 if (coex_dm->pre_rf_rx_lpf_shrink ==
928 coex_dm->cur_rf_rx_lpf_shrink)
931 btc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
932 coex_dm->cur_rf_rx_lpf_shrink);
934 coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
937 static void halbtc8192e2ant_set_dac_swingreg(struct btc_coexist *btcoexist,
942 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
943 "[BTCoex], Write SwDacSwing = 0x%x\n", level);
944 btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
947 static void btc8192e2ant_setsw_full_swing(struct btc_coexist *btcoexist,
952 halbtc8192e2ant_set_dac_swingreg(btcoexist, sw_dac_swinglvl);
954 halbtc8192e2ant_set_dac_swingreg(btcoexist, 0x18);
957 static void halbtc8192e2ant_DacSwing(struct btc_coexist *btcoexist,
958 bool force_exec, bool dac_swingon,
961 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
962 "[BTCoex], %s turn DacSwing=%s, dac_swinglvl = 0x%x\n",
963 (force_exec ? "force to" : ""),
964 ((dac_swingon) ? "ON" : "OFF"), dac_swinglvl);
965 coex_dm->cur_dac_swing_on = dac_swingon;
966 coex_dm->cur_dac_swing_lvl = dac_swinglvl;
969 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
970 "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl = 0x%x, ",
971 coex_dm->pre_dac_swing_on,
972 coex_dm->pre_dac_swing_lvl);
973 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
974 "bCurDacSwingOn=%d, curDacSwingLvl = 0x%x\n",
975 coex_dm->cur_dac_swing_on,
976 coex_dm->cur_dac_swing_lvl);
978 if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
979 (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
983 btc8192e2ant_setsw_full_swing(btcoexist, dac_swingon, dac_swinglvl);
985 coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
986 coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
989 static void halbtc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
992 /* BB AGC Gain Table */
994 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
995 "[BTCoex], BB Agc Table On!\n");
996 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
997 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
998 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
999 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
1000 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
1001 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
1003 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1004 "[BTCoex], BB Agc Table Off!\n");
1005 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
1006 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
1007 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
1008 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
1009 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
1010 btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
1014 static void halbtc8192e2ant_AgcTable(struct btc_coexist *btcoexist,
1015 bool force_exec, bool agc_table_en)
1017 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1018 "[BTCoex], %s %s Agc Table\n",
1019 (force_exec ? "force to" : ""),
1020 ((agc_table_en) ? "Enable" : "Disable"));
1021 coex_dm->cur_agc_table_en = agc_table_en;
1024 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1025 "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
1026 coex_dm->pre_agc_table_en, coex_dm->cur_agc_table_en);
1028 if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
1031 halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
1033 coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
1036 static void halbtc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
1037 u32 val0x6c0, u32 val0x6c4,
1038 u32 val0x6c8, u8 val0x6cc)
1040 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1041 "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0);
1042 btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
1044 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1045 "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4);
1046 btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
1048 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1049 "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8);
1050 btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
1052 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
1053 "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc);
1054 btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
1057 static void halbtc8192e2ant_coex_table(struct btc_coexist *btcoexist,
1059 u32 val0x6c0, u32 val0x6c4,
1060 u32 val0x6c8, u8 val0x6cc)
1062 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1063 "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, ",
1064 (force_exec ? "force to" : ""), val0x6c0);
1065 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
1066 "0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n",
1067 val0x6c4, val0x6c8, val0x6cc);
1068 coex_dm->cur_val0x6c0 = val0x6c0;
1069 coex_dm->cur_val0x6c4 = val0x6c4;
1070 coex_dm->cur_val0x6c8 = val0x6c8;
1071 coex_dm->cur_val0x6cc = val0x6cc;
1074 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1075 "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, ",
1076 coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4);
1077 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1078 "preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n",
1079 coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
1080 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1081 "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x,\n",
1082 coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4);
1083 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
1084 "curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n",
1085 coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
1087 if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
1088 (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
1089 (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
1090 (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
1093 halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
1094 val0x6c8, val0x6cc);
1096 coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
1097 coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
1098 coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
1099 coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
1102 static void btc8192e2ant_coex_tbl_w_type(struct btc_coexist *btcoexist,
1103 bool force_exec, u8 type)
1107 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1108 0x5a5a5a5a, 0xffffff, 0x3);
1111 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
1112 0x5a5a5a5a, 0xffffff, 0x3);
1115 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
1116 0x5ffb5ffb, 0xffffff, 0x3);
1119 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1120 0x5fdb5fdb, 0xffffff, 0x3);
1123 halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
1124 0x5ffb5ffb, 0xffffff, 0x3);
1131 static void halbtc8192e2ant_set_fw_ignore_wlanact(struct btc_coexist *btcoexist,
1134 u8 h2c_parameter[1] = {0};
1137 h2c_parameter[0] |= BIT0; /* function enable */
1139 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1140 "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
1143 btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
1146 static void halbtc8192e2ant_IgnoreWlanAct(struct btc_coexist *btcoexist,
1147 bool force_exec, bool enable)
1149 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1150 "[BTCoex], %s turn Ignore WlanAct %s\n",
1151 (force_exec ? "force to" : ""), (enable ? "ON" : "OFF"));
1152 coex_dm->cur_ignore_wlan_act = enable;
1155 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1156 "[BTCoex], bPreIgnoreWlanAct = %d ",
1157 coex_dm->pre_ignore_wlan_act);
1158 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1159 "bCurIgnoreWlanAct = %d!!\n",
1160 coex_dm->cur_ignore_wlan_act);
1162 if (coex_dm->pre_ignore_wlan_act ==
1163 coex_dm->cur_ignore_wlan_act)
1166 halbtc8192e2ant_set_fw_ignore_wlanact(btcoexist, enable);
1168 coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
1171 static void halbtc8192e2ant_SetFwPstdma(struct btc_coexist *btcoexist, u8 byte1,
1172 u8 byte2, u8 byte3, u8 byte4, u8 byte5)
1174 u8 h2c_parameter[5] = {0};
1176 h2c_parameter[0] = byte1;
1177 h2c_parameter[1] = byte2;
1178 h2c_parameter[2] = byte3;
1179 h2c_parameter[3] = byte4;
1180 h2c_parameter[4] = byte5;
1182 coex_dm->ps_tdma_para[0] = byte1;
1183 coex_dm->ps_tdma_para[1] = byte2;
1184 coex_dm->ps_tdma_para[2] = byte3;
1185 coex_dm->ps_tdma_para[3] = byte4;
1186 coex_dm->ps_tdma_para[4] = byte5;
1188 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
1189 "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n",
1191 h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
1192 h2c_parameter[3] << 8 | h2c_parameter[4]);
1194 btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
1197 static void btc8192e2ant_sw_mec1(struct btc_coexist *btcoexist,
1198 bool shrink_rx_lpf, bool low_penalty_ra,
1199 bool limited_dig, bool btlan_constrain)
1201 halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
1204 static void btc8192e2ant_sw_mec2(struct btc_coexist *btcoexist,
1205 bool agc_table_shift, bool adc_backoff,
1206 bool sw_dac_swing, u32 dac_swinglvl)
1208 halbtc8192e2ant_AgcTable(btcoexist, NORMAL_EXEC, agc_table_shift);
1209 halbtc8192e2ant_DacSwing(btcoexist, NORMAL_EXEC, sw_dac_swing,
1213 static void halbtc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
1214 bool force_exec, bool turn_on, u8 type)
1216 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
1217 "[BTCoex], %s turn %s PS TDMA, type=%d\n",
1218 (force_exec ? "force to" : ""),
1219 (turn_on ? "ON" : "OFF"), type);
1220 coex_dm->cur_ps_tdma_on = turn_on;
1221 coex_dm->cur_ps_tdma = type;
1224 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1225 "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
1226 coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
1227 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
1228 "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
1229 coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
1231 if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
1232 (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
1239 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1243 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1247 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1251 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1255 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1259 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1263 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1267 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xa3, 0x10,
1271 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1275 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1279 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1283 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
1287 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1291 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1295 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
1299 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
1303 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x61, 0x20,
1307 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x5,
1311 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1315 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
1319 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x15,
1323 halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
1328 /* disable PS tdma */
1332 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x8, 0x0, 0x0,
1334 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
1337 halbtc8192e2ant_SetFwPstdma(btcoexist, 0x0, 0x0, 0x0,
1340 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
1345 /* update pre state */
1346 coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
1347 coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
1350 static void halbtc8192e2ant_set_switch_sstype(struct btc_coexist *btcoexist,
1353 u8 mimops = BTC_MIMO_PS_DYNAMIC;
1354 u32 disra_mask = 0x0;
1356 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1357 "[BTCoex], REAL set SS Type = %d\n", sstype);
1359 disra_mask = halbtc8192e2ant_decidera_mask(btcoexist, sstype,
1360 coex_dm->curra_masktype);
1361 halbtc8192e2ant_Updatera_mask(btcoexist, FORCE_EXEC, disra_mask);
1364 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1365 /* switch ofdm path */
1366 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
1367 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
1368 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
1369 /* switch cck patch */
1370 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
1371 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
1372 mimops = BTC_MIMO_PS_STATIC;
1373 } else if (sstype == 2) {
1374 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
1375 btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
1376 btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
1377 btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
1378 btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0);
1379 btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41);
1380 mimops = BTC_MIMO_PS_DYNAMIC;
1382 /* set rx 1ss or 2ss */
1383 btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
1386 static void halbtc8192e2ant_switch_sstype(struct btc_coexist *btcoexist,
1387 bool force_exec, u8 new_sstype)
1389 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1390 "[BTCoex], %s Switch SS Type = %d\n",
1391 (force_exec ? "force to" : ""), new_sstype);
1392 coex_dm->cur_sstype = new_sstype;
1395 if (coex_dm->pre_sstype == coex_dm->cur_sstype)
1398 halbtc8192e2ant_set_switch_sstype(btcoexist, coex_dm->cur_sstype);
1400 coex_dm->pre_sstype = coex_dm->cur_sstype;
1403 static void halbtc8192e2ant_coex_alloff(struct btc_coexist *btcoexist)
1406 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
1407 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1408 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1411 btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
1412 btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
1415 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 0);
1418 static void halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
1420 /* force to reset coex mechanism */
1422 halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
1423 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, FORCE_EXEC, 6);
1424 halbtc8192e2ant_dec_btpwr(btcoexist, FORCE_EXEC, 0);
1426 btc8192e2ant_coex_tbl_w_type(btcoexist, FORCE_EXEC, 0);
1427 halbtc8192e2ant_switch_sstype(btcoexist, FORCE_EXEC, 2);
1429 btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
1430 btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
1433 static void halbtc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
1435 bool low_pwr_disable = true;
1437 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1440 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
1442 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
1443 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
1444 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1445 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1447 btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
1448 btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
1451 static bool halbtc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
1453 struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
1454 bool common = false, wifi_connected = false, wifi_busy = false;
1455 bool bt_hson = false, low_pwr_disable = false;
1457 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
1458 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
1460 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
1462 if (bt_link_info->sco_exist || bt_link_info->hid_exist)
1463 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
1465 halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
1467 if (!wifi_connected) {
1468 low_pwr_disable = false;
1469 btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
1472 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1473 "[BTCoex], Wifi non-connected idle!!\n");
1475 if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1476 coex_dm->bt_status) ||
1477 (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1478 coex_dm->bt_status)) {
1479 halbtc8192e2ant_switch_sstype(btcoexist,
1481 btc8192e2ant_coex_tbl_w_type(btcoexist,
1483 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1486 halbtc8192e2ant_switch_sstype(btcoexist,
1488 btc8192e2ant_coex_tbl_w_type(btcoexist,
1490 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1494 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
1495 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1497 btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
1498 btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
1502 if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
1503 coex_dm->bt_status) {
1504 low_pwr_disable = false;
1505 btcoexist->btc_set(btcoexist,
1506 BTC_SET_ACT_DISABLE_LOW_POWER,
1509 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1510 "Wifi connected + BT non connected-idle!!\n");
1512 halbtc8192e2ant_switch_sstype(btcoexist,
1514 btc8192e2ant_coex_tbl_w_type(btcoexist,
1516 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1518 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1520 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1522 btc8192e2ant_sw_mec1(btcoexist, false, false,
1524 btc8192e2ant_sw_mec2(btcoexist, false, false,
1528 } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
1529 coex_dm->bt_status) {
1530 low_pwr_disable = true;
1531 btcoexist->btc_set(btcoexist,
1532 BTC_SET_ACT_DISABLE_LOW_POWER,
1537 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1538 "Wifi connected + BT connected-idle!!\n");
1540 halbtc8192e2ant_switch_sstype(btcoexist,
1542 btc8192e2ant_coex_tbl_w_type(btcoexist,
1544 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1546 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1548 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
1550 btc8192e2ant_sw_mec1(btcoexist, true, false,
1552 btc8192e2ant_sw_mec2(btcoexist, false, false,
1557 low_pwr_disable = true;
1558 btcoexist->btc_set(btcoexist,
1559 BTC_SET_ACT_DISABLE_LOW_POWER,
1563 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1564 "Wifi Connected-Busy + BT Busy!!\n");
1567 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
1568 "Wifi Connected-Idle + BT Busy!!\n");
1570 halbtc8192e2ant_switch_sstype(btcoexist,
1572 btc8192e2ant_coex_tbl_w_type(btcoexist,
1574 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1576 halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
1578 halbtc8192e2ant_dec_btpwr(btcoexist,
1580 btc8192e2ant_sw_mec1(btcoexist, false,
1581 false, false, false);
1582 btc8192e2ant_sw_mec2(btcoexist, false,
1583 false, false, 0x18);
1591 static void btc8192e_int1(struct btc_coexist *btcoexist, bool tx_pause,
1595 BTC_PRINT(BTC_MSG_ALGORITHM,
1596 ALGO_TRACE_FW_DETAIL,
1597 "[BTCoex], TxPause = 1\n");
1599 if (coex_dm->cur_ps_tdma == 71) {
1600 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1602 coex_dm->tdma_adj_type = 5;
1603 } else if (coex_dm->cur_ps_tdma == 1) {
1604 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1606 coex_dm->tdma_adj_type = 5;
1607 } else if (coex_dm->cur_ps_tdma == 2) {
1608 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1610 coex_dm->tdma_adj_type = 6;
1611 } else if (coex_dm->cur_ps_tdma == 3) {
1612 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1614 coex_dm->tdma_adj_type = 7;
1615 } else if (coex_dm->cur_ps_tdma == 4) {
1616 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1618 coex_dm->tdma_adj_type = 8;
1620 if (coex_dm->cur_ps_tdma == 9) {
1621 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1623 coex_dm->tdma_adj_type = 13;
1624 } else if (coex_dm->cur_ps_tdma == 10) {
1625 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1627 coex_dm->tdma_adj_type = 14;
1628 } else if (coex_dm->cur_ps_tdma == 11) {
1629 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1631 coex_dm->tdma_adj_type = 15;
1632 } else if (coex_dm->cur_ps_tdma == 12) {
1633 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1635 coex_dm->tdma_adj_type = 16;
1639 if (coex_dm->cur_ps_tdma == 5) {
1640 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1642 coex_dm->tdma_adj_type = 6;
1643 } else if (coex_dm->cur_ps_tdma == 6) {
1644 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1646 coex_dm->tdma_adj_type = 7;
1647 } else if (coex_dm->cur_ps_tdma == 7) {
1648 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1650 coex_dm->tdma_adj_type = 8;
1651 } else if (coex_dm->cur_ps_tdma == 13) {
1652 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1654 coex_dm->tdma_adj_type = 14;
1655 } else if (coex_dm->cur_ps_tdma == 14) {
1656 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1658 coex_dm->tdma_adj_type = 15;
1659 } else if (coex_dm->cur_ps_tdma == 15) {
1660 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1662 coex_dm->tdma_adj_type = 16;
1664 } else if (result == 1) {
1665 if (coex_dm->cur_ps_tdma == 8) {
1666 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1668 coex_dm->tdma_adj_type = 7;
1669 } else if (coex_dm->cur_ps_tdma == 7) {
1670 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1672 coex_dm->tdma_adj_type = 6;
1673 } else if (coex_dm->cur_ps_tdma == 6) {
1674 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1676 coex_dm->tdma_adj_type = 5;
1677 } else if (coex_dm->cur_ps_tdma == 16) {
1678 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1680 coex_dm->tdma_adj_type = 15;
1681 } else if (coex_dm->cur_ps_tdma == 15) {
1682 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1684 coex_dm->tdma_adj_type = 14;
1685 } else if (coex_dm->cur_ps_tdma == 14) {
1686 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1688 coex_dm->tdma_adj_type = 13;
1692 BTC_PRINT(BTC_MSG_ALGORITHM,
1693 ALGO_TRACE_FW_DETAIL,
1694 "[BTCoex], TxPause = 0\n");
1695 if (coex_dm->cur_ps_tdma == 5) {
1696 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1698 coex_dm->tdma_adj_type = 71;
1699 } else if (coex_dm->cur_ps_tdma == 6) {
1700 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1702 coex_dm->tdma_adj_type = 2;
1703 } else if (coex_dm->cur_ps_tdma == 7) {
1704 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1706 coex_dm->tdma_adj_type = 3;
1707 } else if (coex_dm->cur_ps_tdma == 8) {
1708 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1710 coex_dm->tdma_adj_type = 4;
1712 if (coex_dm->cur_ps_tdma == 13) {
1713 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1715 coex_dm->tdma_adj_type = 9;
1716 } else if (coex_dm->cur_ps_tdma == 14) {
1717 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1719 coex_dm->tdma_adj_type = 10;
1720 } else if (coex_dm->cur_ps_tdma == 15) {
1721 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1723 coex_dm->tdma_adj_type = 11;
1724 } else if (coex_dm->cur_ps_tdma == 16) {
1725 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1727 coex_dm->tdma_adj_type = 12;
1731 if (coex_dm->cur_ps_tdma == 71) {
1732 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1734 coex_dm->tdma_adj_type = 1;
1735 } else if (coex_dm->cur_ps_tdma == 1) {
1736 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1738 coex_dm->tdma_adj_type = 2;
1739 } else if (coex_dm->cur_ps_tdma == 2) {
1740 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1742 coex_dm->tdma_adj_type = 3;
1743 } else if (coex_dm->cur_ps_tdma == 3) {
1744 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1746 coex_dm->tdma_adj_type = 4;
1747 } else if (coex_dm->cur_ps_tdma == 9) {
1748 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1750 coex_dm->tdma_adj_type = 10;
1751 } else if (coex_dm->cur_ps_tdma == 10) {
1752 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1754 coex_dm->tdma_adj_type = 11;
1755 } else if (coex_dm->cur_ps_tdma == 11) {
1756 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1758 coex_dm->tdma_adj_type = 12;
1760 } else if (result == 1) {
1761 if (coex_dm->cur_ps_tdma == 4) {
1762 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1764 coex_dm->tdma_adj_type = 3;
1765 } else if (coex_dm->cur_ps_tdma == 3) {
1766 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1768 coex_dm->tdma_adj_type = 2;
1769 } else if (coex_dm->cur_ps_tdma == 2) {
1770 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1772 coex_dm->tdma_adj_type = 1;
1773 } else if (coex_dm->cur_ps_tdma == 1) {
1774 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1776 coex_dm->tdma_adj_type = 71;
1777 } else if (coex_dm->cur_ps_tdma == 12) {
1778 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1780 coex_dm->tdma_adj_type = 11;
1781 } else if (coex_dm->cur_ps_tdma == 11) {
1782 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1784 coex_dm->tdma_adj_type = 10;
1785 } else if (coex_dm->cur_ps_tdma == 10) {
1786 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1788 coex_dm->tdma_adj_type = 9;
1794 static void btc8192e_int2(struct btc_coexist *btcoexist, bool tx_pause,
1798 BTC_PRINT(BTC_MSG_ALGORITHM,
1799 ALGO_TRACE_FW_DETAIL,
1800 "[BTCoex], TxPause = 1\n");
1801 if (coex_dm->cur_ps_tdma == 1) {
1802 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1804 coex_dm->tdma_adj_type = 6;
1805 } else if (coex_dm->cur_ps_tdma == 2) {
1806 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1808 coex_dm->tdma_adj_type = 6;
1809 } else if (coex_dm->cur_ps_tdma == 3) {
1810 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1812 coex_dm->tdma_adj_type = 7;
1813 } else if (coex_dm->cur_ps_tdma == 4) {
1814 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1816 coex_dm->tdma_adj_type = 8;
1818 if (coex_dm->cur_ps_tdma == 9) {
1819 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1821 coex_dm->tdma_adj_type = 14;
1822 } else if (coex_dm->cur_ps_tdma == 10) {
1823 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1825 coex_dm->tdma_adj_type = 14;
1826 } else if (coex_dm->cur_ps_tdma == 11) {
1827 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1829 coex_dm->tdma_adj_type = 15;
1830 } else if (coex_dm->cur_ps_tdma == 12) {
1831 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1833 coex_dm->tdma_adj_type = 16;
1836 if (coex_dm->cur_ps_tdma == 5) {
1837 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1839 coex_dm->tdma_adj_type = 6;
1840 } else if (coex_dm->cur_ps_tdma == 6) {
1841 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1843 coex_dm->tdma_adj_type = 7;
1844 } else if (coex_dm->cur_ps_tdma == 7) {
1845 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1847 coex_dm->tdma_adj_type = 8;
1848 } else if (coex_dm->cur_ps_tdma == 13) {
1849 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1851 coex_dm->tdma_adj_type = 14;
1852 } else if (coex_dm->cur_ps_tdma == 14) {
1853 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1855 coex_dm->tdma_adj_type = 15;
1856 } else if (coex_dm->cur_ps_tdma == 15) {
1857 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1859 coex_dm->tdma_adj_type = 16;
1861 } else if (result == 1) {
1862 if (coex_dm->cur_ps_tdma == 8) {
1863 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1865 coex_dm->tdma_adj_type = 7;
1866 } else if (coex_dm->cur_ps_tdma == 7) {
1867 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1869 coex_dm->tdma_adj_type = 6;
1870 } else if (coex_dm->cur_ps_tdma == 6) {
1871 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1873 coex_dm->tdma_adj_type = 6;
1874 } else if (coex_dm->cur_ps_tdma == 16) {
1875 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1877 coex_dm->tdma_adj_type = 15;
1878 } else if (coex_dm->cur_ps_tdma == 15) {
1879 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1881 coex_dm->tdma_adj_type = 14;
1882 } else if (coex_dm->cur_ps_tdma == 14) {
1883 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1885 coex_dm->tdma_adj_type = 14;
1889 BTC_PRINT(BTC_MSG_ALGORITHM,
1890 ALGO_TRACE_FW_DETAIL,
1891 "[BTCoex], TxPause = 0\n");
1892 if (coex_dm->cur_ps_tdma == 5) {
1893 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1895 coex_dm->tdma_adj_type = 2;
1896 } else if (coex_dm->cur_ps_tdma == 6) {
1897 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1899 coex_dm->tdma_adj_type = 2;
1900 } else if (coex_dm->cur_ps_tdma == 7) {
1901 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1903 coex_dm->tdma_adj_type = 3;
1904 } else if (coex_dm->cur_ps_tdma == 8) {
1905 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1907 coex_dm->tdma_adj_type = 4;
1909 if (coex_dm->cur_ps_tdma == 13) {
1910 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1912 coex_dm->tdma_adj_type = 10;
1913 } else if (coex_dm->cur_ps_tdma == 14) {
1914 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1916 coex_dm->tdma_adj_type = 10;
1917 } else if (coex_dm->cur_ps_tdma == 15) {
1918 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1920 coex_dm->tdma_adj_type = 11;
1921 } else if (coex_dm->cur_ps_tdma == 16) {
1922 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1924 coex_dm->tdma_adj_type = 12;
1927 if (coex_dm->cur_ps_tdma == 1) {
1928 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1930 coex_dm->tdma_adj_type = 2;
1931 } else if (coex_dm->cur_ps_tdma == 2) {
1932 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1934 coex_dm->tdma_adj_type = 3;
1935 } else if (coex_dm->cur_ps_tdma == 3) {
1936 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1938 coex_dm->tdma_adj_type = 4;
1939 } else if (coex_dm->cur_ps_tdma == 9) {
1940 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1942 coex_dm->tdma_adj_type = 10;
1943 } else if (coex_dm->cur_ps_tdma == 10) {
1944 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1946 coex_dm->tdma_adj_type = 11;
1947 } else if (coex_dm->cur_ps_tdma == 11) {
1948 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1950 coex_dm->tdma_adj_type = 12;
1952 } else if (result == 1) {
1953 if (coex_dm->cur_ps_tdma == 4) {
1954 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1956 coex_dm->tdma_adj_type = 3;
1957 } else if (coex_dm->cur_ps_tdma == 3) {
1958 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1960 coex_dm->tdma_adj_type = 2;
1961 } else if (coex_dm->cur_ps_tdma == 2) {
1962 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1964 coex_dm->tdma_adj_type = 2;
1965 } else if (coex_dm->cur_ps_tdma == 12) {
1966 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1968 coex_dm->tdma_adj_type = 11;
1969 } else if (coex_dm->cur_ps_tdma == 11) {
1970 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1972 coex_dm->tdma_adj_type = 10;
1973 } else if (coex_dm->cur_ps_tdma == 10) {
1974 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1976 coex_dm->tdma_adj_type = 10;
1982 static void btc8192e_int3(struct btc_coexist *btcoexist, bool tx_pause,
1986 BTC_PRINT(BTC_MSG_ALGORITHM,
1987 ALGO_TRACE_FW_DETAIL,
1988 "[BTCoex], TxPause = 1\n");
1989 if (coex_dm->cur_ps_tdma == 1) {
1990 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1992 coex_dm->tdma_adj_type = 7;
1993 } else if (coex_dm->cur_ps_tdma == 2) {
1994 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
1996 coex_dm->tdma_adj_type = 7;
1997 } else if (coex_dm->cur_ps_tdma == 3) {
1998 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2000 coex_dm->tdma_adj_type = 7;
2001 } else if (coex_dm->cur_ps_tdma == 4) {
2002 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2004 coex_dm->tdma_adj_type = 8;
2006 if (coex_dm->cur_ps_tdma == 9) {
2007 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2009 coex_dm->tdma_adj_type = 15;
2010 } else if (coex_dm->cur_ps_tdma == 10) {
2011 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2013 coex_dm->tdma_adj_type = 15;
2014 } else if (coex_dm->cur_ps_tdma == 11) {
2015 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2017 coex_dm->tdma_adj_type = 15;
2018 } else if (coex_dm->cur_ps_tdma == 12) {
2019 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2021 coex_dm->tdma_adj_type = 16;
2024 if (coex_dm->cur_ps_tdma == 5) {
2025 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2027 coex_dm->tdma_adj_type = 7;
2028 } else if (coex_dm->cur_ps_tdma == 6) {
2029 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2031 coex_dm->tdma_adj_type = 7;
2032 } else if (coex_dm->cur_ps_tdma == 7) {
2033 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2035 coex_dm->tdma_adj_type = 8;
2036 } else if (coex_dm->cur_ps_tdma == 13) {
2037 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2039 coex_dm->tdma_adj_type = 15;
2040 } else if (coex_dm->cur_ps_tdma == 14) {
2041 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2043 coex_dm->tdma_adj_type = 15;
2044 } else if (coex_dm->cur_ps_tdma == 15) {
2045 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2047 coex_dm->tdma_adj_type = 16;
2049 } else if (result == 1) {
2050 if (coex_dm->cur_ps_tdma == 8) {
2051 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2053 coex_dm->tdma_adj_type = 7;
2054 } else if (coex_dm->cur_ps_tdma == 7) {
2055 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2057 coex_dm->tdma_adj_type = 7;
2058 } else if (coex_dm->cur_ps_tdma == 6) {
2059 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2061 coex_dm->tdma_adj_type = 7;
2062 } else if (coex_dm->cur_ps_tdma == 16) {
2063 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2065 coex_dm->tdma_adj_type = 15;
2066 } else if (coex_dm->cur_ps_tdma == 15) {
2067 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2069 coex_dm->tdma_adj_type = 15;
2070 } else if (coex_dm->cur_ps_tdma == 14) {
2071 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2073 coex_dm->tdma_adj_type = 15;
2077 BTC_PRINT(BTC_MSG_ALGORITHM,
2078 ALGO_TRACE_FW_DETAIL,
2079 "[BTCoex], TxPause = 0\n");
2080 if (coex_dm->cur_ps_tdma == 5) {
2081 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2083 coex_dm->tdma_adj_type = 3;
2084 } else if (coex_dm->cur_ps_tdma == 6) {
2085 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2087 coex_dm->tdma_adj_type = 3;
2088 } else if (coex_dm->cur_ps_tdma == 7) {
2089 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2091 coex_dm->tdma_adj_type = 3;
2092 } else if (coex_dm->cur_ps_tdma == 8) {
2093 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2095 coex_dm->tdma_adj_type = 4;
2097 if (coex_dm->cur_ps_tdma == 13) {
2098 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2100 coex_dm->tdma_adj_type = 11;
2101 } else if (coex_dm->cur_ps_tdma == 14) {
2102 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2104 coex_dm->tdma_adj_type = 11;
2105 } else if (coex_dm->cur_ps_tdma == 15) {
2106 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2108 coex_dm->tdma_adj_type = 11;
2109 } else if (coex_dm->cur_ps_tdma == 16) {
2110 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2112 coex_dm->tdma_adj_type = 12;
2115 if (coex_dm->cur_ps_tdma == 1) {
2116 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2118 coex_dm->tdma_adj_type = 3;
2119 } else if (coex_dm->cur_ps_tdma == 2) {
2120 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2122 coex_dm->tdma_adj_type = 3;
2123 } else if (coex_dm->cur_ps_tdma == 3) {
2124 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2126 coex_dm->tdma_adj_type = 4;
2127 } else if (coex_dm->cur_ps_tdma == 9) {
2128 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2130 coex_dm->tdma_adj_type = 11;
2131 } else if (coex_dm->cur_ps_tdma == 10) {
2132 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2134 coex_dm->tdma_adj_type = 11;
2135 } else if (coex_dm->cur_ps_tdma == 11) {
2136 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2138 coex_dm->tdma_adj_type = 12;
2140 } else if (result == 1) {
2141 if (coex_dm->cur_ps_tdma == 4) {
2142 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2144 coex_dm->tdma_adj_type = 3;
2145 } else if (coex_dm->cur_ps_tdma == 3) {
2146 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2148 coex_dm->tdma_adj_type = 3;
2149 } else if (coex_dm->cur_ps_tdma == 2) {
2150 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2152 coex_dm->tdma_adj_type = 3;
2153 } else if (coex_dm->cur_ps_tdma == 12) {
2154 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2156 coex_dm->tdma_adj_type = 11;
2157 } else if (coex_dm->cur_ps_tdma == 11) {
2158 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2160 coex_dm->tdma_adj_type = 11;
2161 } else if (coex_dm->cur_ps_tdma == 10) {
2162 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2164 coex_dm->tdma_adj_type = 11;
2170 static void halbtc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
2171 bool sco_hid, bool tx_pause,
2174 static int up, dn, m, n, wait_cnt;
2175 /* 0: no change, +1: increase WiFi duration,
2176 * -1: decrease WiFi duration
2181 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
2182 "[BTCoex], TdmaDurationAdjust()\n");
2184 if (!coex_dm->auto_tdma_adjust) {
2185 coex_dm->auto_tdma_adjust = true;
2186 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2187 "[BTCoex], first run TdmaDurationAdjust()!!\n");
2190 if (max_interval == 1) {
2191 halbtc8192e2ant_ps_tdma(btcoexist,
2194 coex_dm->tdma_adj_type = 13;
2195 } else if (max_interval == 2) {
2196 halbtc8192e2ant_ps_tdma(btcoexist,
2199 coex_dm->tdma_adj_type = 14;
2200 } else if (max_interval == 3) {
2201 halbtc8192e2ant_ps_tdma(btcoexist,
2204 coex_dm->tdma_adj_type = 15;
2206 halbtc8192e2ant_ps_tdma(btcoexist,
2209 coex_dm->tdma_adj_type = 15;
2212 if (max_interval == 1) {
2213 halbtc8192e2ant_ps_tdma(btcoexist,
2216 coex_dm->tdma_adj_type = 9;
2217 } else if (max_interval == 2) {
2218 halbtc8192e2ant_ps_tdma(btcoexist,
2221 coex_dm->tdma_adj_type = 10;
2222 } else if (max_interval == 3) {
2223 halbtc8192e2ant_ps_tdma(btcoexist,
2226 coex_dm->tdma_adj_type = 11;
2228 halbtc8192e2ant_ps_tdma(btcoexist,
2231 coex_dm->tdma_adj_type = 11;
2236 if (max_interval == 1) {
2237 halbtc8192e2ant_ps_tdma(btcoexist,
2240 coex_dm->tdma_adj_type = 5;
2241 } else if (max_interval == 2) {
2242 halbtc8192e2ant_ps_tdma(btcoexist,
2245 coex_dm->tdma_adj_type = 6;
2246 } else if (max_interval == 3) {
2247 halbtc8192e2ant_ps_tdma(btcoexist,
2250 coex_dm->tdma_adj_type = 7;
2252 halbtc8192e2ant_ps_tdma(btcoexist,
2255 coex_dm->tdma_adj_type = 7;
2258 if (max_interval == 1) {
2259 halbtc8192e2ant_ps_tdma(btcoexist,
2262 coex_dm->tdma_adj_type = 1;
2263 } else if (max_interval == 2) {
2264 halbtc8192e2ant_ps_tdma(btcoexist,
2267 coex_dm->tdma_adj_type = 2;
2268 } else if (max_interval == 3) {
2269 halbtc8192e2ant_ps_tdma(btcoexist,
2272 coex_dm->tdma_adj_type = 3;
2274 halbtc8192e2ant_ps_tdma(btcoexist,
2277 coex_dm->tdma_adj_type = 3;
2289 /* accquire the BT TRx retry count from BT_Info byte2 */
2290 retry_cnt = coex_sta->bt_retry_cnt;
2291 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2292 "[BTCoex], retry_cnt = %d\n", retry_cnt);
2293 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2294 "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n",
2295 up, dn, m, n, wait_cnt);
2298 /* no retry in the last 2-second duration */
2299 if (retry_cnt == 0) {
2312 BTC_PRINT(BTC_MSG_ALGORITHM,
2313 ALGO_TRACE_FW_DETAIL,
2314 "[BTCoex]Increase wifi duration!!\n");
2316 } else if (retry_cnt <= 3) {
2337 BTC_PRINT(BTC_MSG_ALGORITHM,
2338 ALGO_TRACE_FW_DETAIL,
2339 "Reduce wifi duration for retry<3\n");
2355 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2356 "Decrease wifi duration for retryCounter>3!!\n");
2359 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2360 "[BTCoex], max Interval = %d\n", max_interval);
2361 if (max_interval == 1)
2362 btc8192e_int1(btcoexist, tx_pause, result);
2363 else if (max_interval == 2)
2364 btc8192e_int2(btcoexist, tx_pause, result);
2365 else if (max_interval == 3)
2366 btc8192e_int3(btcoexist, tx_pause, result);
2369 /* if current PsTdma not match with
2370 * the recorded one (when scan, dhcp...),
2371 * then we have to adjust it back to the previous record one.
2373 if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) {
2374 bool scan = false, link = false, roam = false;
2376 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2377 "[BTCoex], PsTdma type dismatch!!!, ");
2378 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
2379 "curPsTdma=%d, recordPsTdma=%d\n",
2380 coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type);
2382 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
2383 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
2384 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
2386 if (!scan && !link && !roam)
2387 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2389 coex_dm->tdma_adj_type);
2391 BTC_PRINT(BTC_MSG_ALGORITHM,
2392 ALGO_TRACE_FW_DETAIL,
2393 "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
2397 /* SCO only or SCO+PAN(HS) */
2398 static void halbtc8192e2ant_action_sco(struct btc_coexist *btcoexist)
2400 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2403 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2405 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2406 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2408 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2410 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 4);
2412 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2414 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2415 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2416 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2417 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2418 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2419 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2420 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2421 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2422 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2423 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2424 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2425 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2428 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2431 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2432 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2433 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2434 btc8192e2ant_sw_mec1(btcoexist, true, true,
2436 btc8192e2ant_sw_mec2(btcoexist, true, false,
2439 btc8192e2ant_sw_mec1(btcoexist, true, true,
2441 btc8192e2ant_sw_mec2(btcoexist, false, false,
2445 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2446 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2447 btc8192e2ant_sw_mec1(btcoexist, false, true,
2449 btc8192e2ant_sw_mec2(btcoexist, true, false,
2452 btc8192e2ant_sw_mec1(btcoexist, false, true,
2454 btc8192e2ant_sw_mec2(btcoexist, false, false,
2460 static void halbtc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
2462 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
2465 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2467 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2468 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2470 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2472 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 4);
2474 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2476 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2477 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2478 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2479 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2480 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2481 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2482 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2483 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2484 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2485 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2486 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2487 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
2490 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2493 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2494 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2495 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2496 btc8192e2ant_sw_mec1(btcoexist, true, true,
2498 btc8192e2ant_sw_mec2(btcoexist, true, false,
2501 btc8192e2ant_sw_mec1(btcoexist, true, true,
2503 btc8192e2ant_sw_mec2(btcoexist, false, false,
2507 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2508 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2509 btc8192e2ant_sw_mec1(btcoexist, false, true,
2511 btc8192e2ant_sw_mec2(btcoexist, true, false,
2514 btc8192e2ant_sw_mec1(btcoexist, false, true,
2516 btc8192e2ant_sw_mec2(btcoexist, false, false,
2522 static void halbtc8192e2ant_action_hid(struct btc_coexist *btcoexist)
2524 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2527 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2528 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2530 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2531 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2533 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2535 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2537 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
2539 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2540 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2541 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2542 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
2543 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2544 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2545 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2546 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2547 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2548 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2549 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2550 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
2554 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2555 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2556 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2557 btc8192e2ant_sw_mec1(btcoexist, true, true,
2559 btc8192e2ant_sw_mec2(btcoexist, true, false,
2562 btc8192e2ant_sw_mec1(btcoexist, true, true,
2564 btc8192e2ant_sw_mec2(btcoexist, false, false,
2568 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2569 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2570 btc8192e2ant_sw_mec1(btcoexist, false, true,
2572 btc8192e2ant_sw_mec2(btcoexist, true, false,
2575 btc8192e2ant_sw_mec1(btcoexist, false, true,
2577 btc8192e2ant_sw_mec2(btcoexist, false, false,
2583 /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
2584 static void halbtc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
2586 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2588 bool long_dist = false;
2590 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2591 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2593 if ((btrssi_state == BTC_RSSI_STATE_LOW ||
2594 btrssi_state == BTC_RSSI_STATE_STAY_LOW) &&
2595 (wifirssi_state == BTC_RSSI_STATE_LOW ||
2596 wifirssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2597 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
2598 "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
2602 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 2);
2603 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
2606 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2607 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
2611 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2614 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 0);
2616 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2619 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
2620 coex_dm->auto_tdma_adjust = false;
2621 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2623 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2624 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2625 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2627 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2628 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2629 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2630 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2632 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2633 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2634 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2635 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2637 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2642 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2643 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2644 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2645 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2646 btc8192e2ant_sw_mec1(btcoexist, true, false,
2648 btc8192e2ant_sw_mec2(btcoexist, true, false,
2651 btc8192e2ant_sw_mec1(btcoexist, true, false,
2653 btc8192e2ant_sw_mec2(btcoexist, false, false,
2657 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2658 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2659 btc8192e2ant_sw_mec1(btcoexist, false, false,
2661 btc8192e2ant_sw_mec2(btcoexist, true, false,
2664 btc8192e2ant_sw_mec1(btcoexist, false, false,
2666 btc8192e2ant_sw_mec2(btcoexist, false, false,
2672 static void halbtc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
2674 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2677 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2678 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2680 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2681 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2683 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2684 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2686 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2687 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2688 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
2689 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2690 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2691 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2692 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2694 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2695 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2696 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2697 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2699 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2703 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2704 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2705 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2706 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2707 btc8192e2ant_sw_mec1(btcoexist, true, false,
2709 btc8192e2ant_sw_mec2(btcoexist, true, false,
2712 btc8192e2ant_sw_mec1(btcoexist, true, false,
2714 btc8192e2ant_sw_mec2(btcoexist, false, false,
2718 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2719 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2720 btc8192e2ant_sw_mec1(btcoexist, false, false,
2722 btc8192e2ant_sw_mec2(btcoexist, true, false,
2725 btc8192e2ant_sw_mec1(btcoexist, false, false,
2727 btc8192e2ant_sw_mec2(btcoexist, false, false,
2733 static void halbtc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
2735 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2738 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2739 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2741 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2742 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2744 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2746 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2748 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2749 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2750 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2751 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
2752 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2753 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2754 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2755 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2756 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2757 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2758 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2759 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
2763 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2764 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2765 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2766 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2767 btc8192e2ant_sw_mec1(btcoexist, true, false,
2769 btc8192e2ant_sw_mec2(btcoexist, true, false,
2772 btc8192e2ant_sw_mec1(btcoexist, true, false,
2774 btc8192e2ant_sw_mec2(btcoexist, false, false,
2778 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2779 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2780 btc8192e2ant_sw_mec1(btcoexist, false, false,
2782 btc8192e2ant_sw_mec2(btcoexist, true, false,
2785 btc8192e2ant_sw_mec1(btcoexist, false, false,
2787 btc8192e2ant_sw_mec2(btcoexist, false, false,
2794 static void halbtc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
2796 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2799 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2800 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2802 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2803 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2805 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2807 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2809 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2810 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2811 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2812 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2813 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2814 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2815 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2816 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2817 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2819 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
2821 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2822 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2823 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2824 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2825 btc8192e2ant_sw_mec1(btcoexist, true, false,
2827 btc8192e2ant_sw_mec2(btcoexist, true, false,
2830 btc8192e2ant_sw_mec1(btcoexist, true, false,
2832 btc8192e2ant_sw_mec2(btcoexist, false, false,
2836 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2837 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2838 btc8192e2ant_sw_mec1(btcoexist, false, false,
2840 btc8192e2ant_sw_mec2(btcoexist, true, false,
2843 btc8192e2ant_sw_mec1(btcoexist, false, false,
2845 btc8192e2ant_sw_mec2(btcoexist, false, false,
2852 static void halbtc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
2854 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2857 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2858 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2860 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2861 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2863 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2865 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
2867 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2869 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2870 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2871 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2872 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
2873 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2874 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2875 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2876 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2878 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2879 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2880 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2881 halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
2886 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2887 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2888 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2889 btc8192e2ant_sw_mec1(btcoexist, true, false,
2891 btc8192e2ant_sw_mec2(btcoexist, true, false,
2894 btc8192e2ant_sw_mec1(btcoexist, true, false,
2896 btc8192e2ant_sw_mec2(btcoexist, false, false,
2900 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2901 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2902 btc8192e2ant_sw_mec1(btcoexist, false, false,
2904 btc8192e2ant_sw_mec2(btcoexist, true, false,
2907 btc8192e2ant_sw_mec1(btcoexist, false, false,
2909 btc8192e2ant_sw_mec2(btcoexist, false, false,
2915 static void halbtc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
2917 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2920 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2921 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2923 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2925 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2926 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2928 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2930 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
2932 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2933 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2934 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2935 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
2936 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
2937 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
2938 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
2939 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2941 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
2942 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2943 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
2944 halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
2949 if (BTC_WIFI_BW_HT40 == wifi_bw) {
2950 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2951 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2952 btc8192e2ant_sw_mec1(btcoexist, true, true,
2954 btc8192e2ant_sw_mec2(btcoexist, true, false,
2957 btc8192e2ant_sw_mec1(btcoexist, true, true,
2959 btc8192e2ant_sw_mec2(btcoexist, false, false,
2963 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
2964 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
2965 btc8192e2ant_sw_mec1(btcoexist, false, true,
2967 btc8192e2ant_sw_mec2(btcoexist, true, false,
2970 btc8192e2ant_sw_mec1(btcoexist, false, true,
2972 btc8192e2ant_sw_mec2(btcoexist, false, false,
2978 /* HID+A2DP+PAN(EDR) */
2979 static void btc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
2981 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
2984 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
2985 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
2987 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
2988 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
2990 halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
2992 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
2994 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
2996 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
2997 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
2998 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
2999 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
3000 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3001 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3002 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3003 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3004 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3005 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3006 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3007 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
3011 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3012 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3013 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3014 btc8192e2ant_sw_mec1(btcoexist, true, true,
3016 btc8192e2ant_sw_mec2(btcoexist, true, false,
3019 btc8192e2ant_sw_mec1(btcoexist, true, true,
3021 btc8192e2ant_sw_mec2(btcoexist, false, false,
3025 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3026 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3027 btc8192e2ant_sw_mec1(btcoexist, false, true,
3029 btc8192e2ant_sw_mec2(btcoexist, true, false,
3032 btc8192e2ant_sw_mec1(btcoexist, false, true,
3034 btc8192e2ant_sw_mec2(btcoexist, false, false,
3040 static void halbtc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
3042 u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
3045 wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
3046 btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
3048 halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
3049 halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
3051 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3053 btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
3055 if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
3056 (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
3057 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
3058 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
3059 } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
3060 (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
3061 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
3062 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3063 } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
3064 (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3065 halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
3066 halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
3070 if (BTC_WIFI_BW_HT40 == wifi_bw) {
3071 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3072 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3073 btc8192e2ant_sw_mec1(btcoexist, true, true,
3075 btc8192e2ant_sw_mec2(btcoexist, true, false,
3078 btc8192e2ant_sw_mec1(btcoexist, true, true,
3080 btc8192e2ant_sw_mec2(btcoexist, false, false,
3084 if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
3085 (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
3086 btc8192e2ant_sw_mec1(btcoexist, false, true,
3088 btc8192e2ant_sw_mec2(btcoexist, true, false,
3091 btc8192e2ant_sw_mec1(btcoexist, false, true,
3093 btc8192e2ant_sw_mec2(btcoexist, false, false,
3099 static void halbtc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
3103 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3104 "[BTCoex], RunCoexistMechanism()===>\n");
3106 if (btcoexist->manual_control) {
3107 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3108 "[BTCoex], return for Manual CTRL <===\n");
3112 if (coex_sta->under_ips) {
3113 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3114 "[BTCoex], wifi is under IPS !!!\n");
3118 algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
3119 if (coex_sta->c2h_bt_inquiry_page &&
3120 (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
3121 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3122 "[BTCoex], BT is under inquiry/page scan !!\n");
3123 halbtc8192e2ant_action_bt_inquiry(btcoexist);
3127 coex_dm->cur_algorithm = algorithm;
3128 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3129 "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
3131 if (halbtc8192e2ant_is_common_action(btcoexist)) {
3132 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3133 "[BTCoex], Action 2-Ant common.\n");
3134 coex_dm->auto_tdma_adjust = false;
3136 if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
3137 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3138 "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n",
3139 coex_dm->pre_algorithm,
3140 coex_dm->cur_algorithm);
3141 coex_dm->auto_tdma_adjust = false;
3143 switch (coex_dm->cur_algorithm) {
3144 case BT_8192E_2ANT_COEX_ALGO_SCO:
3145 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3146 "Action 2-Ant, algorithm = SCO.\n");
3147 halbtc8192e2ant_action_sco(btcoexist);
3149 case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
3150 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3151 "Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
3152 halbtc8192e2ant_action_sco_pan(btcoexist);
3154 case BT_8192E_2ANT_COEX_ALGO_HID:
3155 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3156 "Action 2-Ant, algorithm = HID.\n");
3157 halbtc8192e2ant_action_hid(btcoexist);
3159 case BT_8192E_2ANT_COEX_ALGO_A2DP:
3160 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3161 "Action 2-Ant, algorithm = A2DP.\n");
3162 halbtc8192e2ant_action_a2dp(btcoexist);
3164 case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
3165 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3166 "Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
3167 halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
3169 case BT_8192E_2ANT_COEX_ALGO_PANEDR:
3170 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3171 "Action 2-Ant, algorithm = PAN(EDR).\n");
3172 halbtc8192e2ant_action_pan_edr(btcoexist);
3174 case BT_8192E_2ANT_COEX_ALGO_PANHS:
3175 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3176 "Action 2-Ant, algorithm = HS mode.\n");
3177 halbtc8192e2ant_action_pan_hs(btcoexist);
3179 case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
3180 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3181 "Action 2-Ant, algorithm = PAN+A2DP.\n");
3182 halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
3184 case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
3185 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3186 "Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
3187 halbtc8192e2ant_action_pan_edr_hid(btcoexist);
3189 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
3190 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3191 "Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
3192 btc8192e2ant_action_hid_a2dp_pan_edr(btcoexist);
3194 case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
3195 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3196 "Action 2-Ant, algorithm = HID+A2DP.\n");
3197 halbtc8192e2ant_action_hid_a2dp(btcoexist);
3200 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3201 "Action 2-Ant, algorithm = unknown!!\n");
3202 /* halbtc8192e2ant_coex_alloff(btcoexist); */
3205 coex_dm->pre_algorithm = coex_dm->cur_algorithm;
3209 static void halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
3215 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3216 "[BTCoex], 2Ant Init HW Config!!\n");
3219 /* backup rf 0x1e value */
3220 coex_dm->bt_rf0x1e_backup =
3221 btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A,
3224 coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
3226 coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
3228 coex_dm->backup_retrylimit = btcoexist->btc_read_2byte(
3231 coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
3236 /* antenna sw ctrl to bt */
3237 btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6);
3238 btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
3239 btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
3240 btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
3241 if (btcoexist->chip_interface == BTC_INTF_USB)
3242 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
3244 btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
3246 btc8192e2ant_coex_tbl_w_type(btcoexist, FORCE_EXEC, 0);
3248 /* antenna switch control parameter */
3249 btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
3251 /* coex parameters */
3252 btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
3253 /* 0x790[5:0] = 0x5 */
3254 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
3257 btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
3259 /* enable counter statistics */
3260 btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
3263 btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
3264 /* enable mailbox interface */
3265 u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
3267 btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
3269 /* enable PTA I2C mailbox */
3270 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
3272 btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
3274 /* enable bt clock when wifi is disabled. */
3275 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
3277 btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
3278 /* enable bt clock when suspend. */
3279 u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
3281 btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
3284 /*************************************************************
3285 * work around function start with wa_halbtc8192e2ant_
3286 *************************************************************/
3288 /************************************************************
3289 * extern function start with EXhalbtc8192e2ant_
3290 ************************************************************/
3292 void ex_halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
3294 halbtc8192e2ant_init_hwconfig(btcoexist, true);
3297 void ex_halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
3299 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3300 "[BTCoex], Coex Mechanism Init!!\n");
3301 halbtc8192e2ant_init_coex_dm(btcoexist);
3304 void ex_halbtc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
3306 struct btc_board_info *board_info = &btcoexist->board_info;
3307 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3308 struct rtl_priv *rtlpriv = btcoexist->adapter;
3309 u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
3312 bool roam = false, scan = false, link = false, wifi_under_5g = false;
3313 bool bt_hson = false, wifi_busy = false;
3314 int wifirssi = 0, bt_hs_rssi = 0;
3315 u32 wifi_bw, wifi_traffic_dir;
3316 u8 wifi_dot11_chnl, wifi_hs_chnl;
3317 u32 fw_ver = 0, bt_patch_ver = 0;
3319 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3320 "\r\n ============[BT Coexist info]============");
3322 if (btcoexist->manual_control) {
3323 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3324 "\r\n ===========[Under Manual Control]===========");
3325 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3326 "\r\n ==========================================");
3329 if (!board_info->bt_exist) {
3330 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n BT not exists !!!");
3334 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3335 "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:",
3336 board_info->pg_ant_num, board_info->btdm_ant_num);
3338 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s / %d",
3339 "BT stack/ hci ext ver",
3340 ((stack_info->profile_notified) ? "Yes" : "No"),
3341 stack_info->hci_version);
3343 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
3344 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3345 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3346 "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
3347 "CoexVer/ FwVer/ PatchVer",
3348 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3349 fw_ver, bt_patch_ver, bt_patch_ver);
3351 btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
3352 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
3354 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
3355 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d(%d)",
3356 "Dot11 channel / HsMode(HsChnl)",
3357 wifi_dot11_chnl, bt_hson, wifi_hs_chnl);
3359 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %02x %02x %02x ",
3360 "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info[0],
3361 coex_dm->wifi_chnl_info[1], coex_dm->wifi_chnl_info[2]);
3363 btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
3364 btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
3365 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
3366 "Wifi rssi/ HS rssi", wifirssi, bt_hs_rssi);
3368 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
3369 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
3370 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
3371 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d ",
3372 "Wifi link/ roam/ scan", link, roam, scan);
3374 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
3375 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3376 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
3377 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
3379 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s / %s/ %s ",
3380 "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
3381 ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
3382 (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
3383 ((!wifi_busy) ? "idle" :
3384 ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
3385 "uplink" : "downlink")));
3387 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = [%s/ %d/ %d] ",
3388 "BT [status/ rssi/ retryCnt]",
3389 ((btcoexist->bt_info.bt_disabled) ? ("disabled") :
3390 ((coex_sta->c2h_bt_inquiry_page) ?
3391 ("inquiry/page scan") :
3392 ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
3393 coex_dm->bt_status) ? "non-connected idle" :
3394 ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
3395 coex_dm->bt_status) ? "connected-idle" : "busy")))),
3396 coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
3398 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d / %d / %d",
3399 "SCO/HID/PAN/A2DP", stack_info->sco_exist,
3400 stack_info->hid_exist, stack_info->pan_exist,
3401 stack_info->a2dp_exist);
3402 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
3404 bt_info_ext = coex_sta->bt_info_ext;
3405 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s",
3406 "BT Info A2DP rate",
3407 (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
3409 for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
3410 if (coex_sta->bt_info_c2h_cnt[i]) {
3411 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3412 "\r\n %-35s = %02x %02x %02x %02x ",
3413 GLBtInfoSrc8192e2Ant[i],
3414 coex_sta->bt_info_c2h[i][0],
3415 coex_sta->bt_info_c2h[i][1],
3416 coex_sta->bt_info_c2h[i][2],
3417 coex_sta->bt_info_c2h[i][3]);
3418 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3419 "%02x %02x %02x(%d)",
3420 coex_sta->bt_info_c2h[i][4],
3421 coex_sta->bt_info_c2h[i][5],
3422 coex_sta->bt_info_c2h[i][6],
3423 coex_sta->bt_info_c2h_cnt[i]);
3427 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s/%s",
3428 "PS state, IPS/LPS",
3429 ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
3430 ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
3431 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
3433 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "SS Type",
3434 coex_dm->cur_sstype);
3437 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
3438 "============[Sw mechanism]============");
3439 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d ",
3440 "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
3441 coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
3442 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
3443 "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
3444 coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
3445 coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
3447 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "Rate Mask",
3448 btcoexist->bt_info.ra_mask);
3451 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
3452 "============[Fw mechanism]============");
3454 ps_tdma_case = coex_dm->cur_ps_tdma;
3455 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3456 "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
3457 "PS TDMA", coex_dm->ps_tdma_para[0],
3458 coex_dm->ps_tdma_para[1], coex_dm->ps_tdma_para[2],
3459 coex_dm->ps_tdma_para[3], coex_dm->ps_tdma_para[4],
3460 ps_tdma_case, coex_dm->auto_tdma_adjust);
3462 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d ",
3463 "DecBtPwr/ IgnWlanAct",
3464 coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
3467 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
3468 "============[Hw setting]============");
3470 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x",
3471 "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
3473 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3474 "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
3475 coex_dm->backup_arfr_cnt2, coex_dm->backup_retrylimit,
3476 coex_dm->backup_ampdu_maxtime);
3478 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
3479 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
3480 u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
3481 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
3482 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
3483 "0x430/0x434/0x42a/0x456",
3484 u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
3486 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
3487 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
3488 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
3489 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
3490 "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]);
3492 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
3493 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", "0x778",
3496 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
3497 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
3498 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
3499 "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]);
3501 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
3502 u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
3503 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
3504 "0x40/ 0x4f", u8tmp[0], u8tmp[1]);
3506 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
3507 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
3508 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
3509 "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
3511 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
3512 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", "0xc50(dig)",
3515 u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
3516 u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
3517 u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
3518 u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
3519 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
3520 "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
3521 "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
3522 u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
3524 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
3525 "0x770(hp rx[31:16]/tx[15:0])",
3526 coex_sta->high_priority_rx, coex_sta->high_priority_tx);
3527 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
3528 "0x774(lp rx[31:16]/tx[15:0])",
3529 coex_sta->low_priority_rx, coex_sta->low_priority_tx);
3530 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
3531 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3533 btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
3536 void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
3538 if (BTC_IPS_ENTER == type) {
3539 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3540 "[BTCoex], IPS ENTER notify\n");
3541 coex_sta->under_ips = true;
3542 halbtc8192e2ant_coex_alloff(btcoexist);
3543 } else if (BTC_IPS_LEAVE == type) {
3544 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3545 "[BTCoex], IPS LEAVE notify\n");
3546 coex_sta->under_ips = false;
3550 void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
3552 if (BTC_LPS_ENABLE == type) {
3553 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3554 "[BTCoex], LPS ENABLE notify\n");
3555 coex_sta->under_lps = true;
3556 } else if (BTC_LPS_DISABLE == type) {
3557 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3558 "[BTCoex], LPS DISABLE notify\n");
3559 coex_sta->under_lps = false;
3563 void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
3565 if (BTC_SCAN_START == type)
3566 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3567 "[BTCoex], SCAN START notify\n");
3568 else if (BTC_SCAN_FINISH == type)
3569 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3570 "[BTCoex], SCAN FINISH notify\n");
3573 void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
3575 if (BTC_ASSOCIATE_START == type)
3576 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3577 "[BTCoex], CONNECT START notify\n");
3578 else if (BTC_ASSOCIATE_FINISH == type)
3579 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3580 "[BTCoex], CONNECT FINISH notify\n");
3583 void ex_halbtc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
3586 u8 h2c_parameter[3] = {0};
3588 u8 wifi_center_chnl;
3590 if (btcoexist->manual_control ||
3591 btcoexist->stop_coex_dm ||
3592 btcoexist->bt_info.bt_disabled)
3595 if (BTC_MEDIA_CONNECT == type)
3596 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3597 "[BTCoex], MEDIA connect notify\n");
3599 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3600 "[BTCoex], MEDIA disconnect notify\n");
3602 /* only 2.4G we need to inform bt the chnl mask */
3603 btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
3605 if ((BTC_MEDIA_CONNECT == type) &&
3606 (wifi_center_chnl <= 14)) {
3607 h2c_parameter[0] = 0x1;
3608 h2c_parameter[1] = wifi_center_chnl;
3609 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
3610 if (BTC_WIFI_BW_HT40 == wifi_bw)
3611 h2c_parameter[2] = 0x30;
3613 h2c_parameter[2] = 0x20;
3616 coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
3617 coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
3618 coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
3620 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
3621 "[BTCoex], FW write 0x66 = 0x%x\n",
3622 h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
3625 btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
3628 void ex_halbtc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
3631 if (type == BTC_PACKET_DHCP)
3632 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3633 "[BTCoex], DHCP Packet notify\n");
3636 void ex_halbtc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
3637 u8 *tmp_buf, u8 length)
3640 u8 i, rsp_source = 0;
3641 bool bt_busy = false, limited_dig = false;
3642 bool wifi_connected = false;
3644 coex_sta->c2h_bt_info_req_sent = false;
3646 rsp_source = tmp_buf[0] & 0xf;
3647 if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
3648 rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
3649 coex_sta->bt_info_c2h_cnt[rsp_source]++;
3651 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3652 "[BTCoex], Bt info[%d], length=%d, hex data = [",
3653 rsp_source, length);
3654 for (i = 0; i < length; i++) {
3655 coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
3657 bt_info = tmp_buf[i];
3659 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3660 "0x%02x]\n", tmp_buf[i]);
3662 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
3663 "0x%02x, ", tmp_buf[i]);
3666 if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
3667 coex_sta->bt_retry_cnt = /* [3:0] */
3668 coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
3671 coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
3673 coex_sta->bt_info_ext =
3674 coex_sta->bt_info_c2h[rsp_source][4];
3676 /* Here we need to resend some wifi info to BT
3677 * because bt is reset and loss of the info.
3679 if ((coex_sta->bt_info_ext & BIT1)) {
3680 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3681 "bit1, send wifi BW&Chnl to BT!!\n");
3682 btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
3685 ex_halbtc8192e2ant_media_status_notify(
3689 ex_halbtc8192e2ant_media_status_notify(
3691 BTC_MEDIA_DISCONNECT);
3694 if ((coex_sta->bt_info_ext & BIT3)) {
3695 if (!btcoexist->manual_control &&
3696 !btcoexist->stop_coex_dm) {
3697 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3698 "bit3, BT NOT ignore Wlan active!\n");
3699 halbtc8192e2ant_IgnoreWlanAct(btcoexist,
3704 /* BT already NOT ignore Wlan active,
3709 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3710 if ((coex_sta->bt_info_ext & BIT4)) {
3711 /* BT auto report already enabled, do nothing */
3713 halbtc8192e2ant_bt_autoreport(btcoexist, FORCE_EXEC,
3719 /* check BIT2 first ==> check if bt is under inquiry or page scan */
3720 if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
3721 coex_sta->c2h_bt_inquiry_page = true;
3723 coex_sta->c2h_bt_inquiry_page = false;
3725 /* set link exist status */
3726 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
3727 coex_sta->bt_link_exist = false;
3728 coex_sta->pan_exist = false;
3729 coex_sta->a2dp_exist = false;
3730 coex_sta->hid_exist = false;
3731 coex_sta->sco_exist = false;
3732 } else {/* connection exists */
3733 coex_sta->bt_link_exist = true;
3734 if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
3735 coex_sta->pan_exist = true;
3737 coex_sta->pan_exist = false;
3738 if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
3739 coex_sta->a2dp_exist = true;
3741 coex_sta->a2dp_exist = false;
3742 if (bt_info & BT_INFO_8192E_2ANT_B_HID)
3743 coex_sta->hid_exist = true;
3745 coex_sta->hid_exist = false;
3746 if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
3747 coex_sta->sco_exist = true;
3749 coex_sta->sco_exist = false;
3752 halbtc8192e2ant_update_btlink_info(btcoexist);
3754 if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
3755 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
3756 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3757 "[BTCoex], BT Non-Connected idle!!!\n");
3758 } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) {
3759 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
3760 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3761 "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
3762 } else if ((bt_info&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
3763 (bt_info&BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
3764 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
3765 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3766 "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
3767 } else if (bt_info&BT_INFO_8192E_2ANT_B_ACL_BUSY) {
3768 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
3769 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3770 "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
3772 coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
3773 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3774 "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n");
3777 if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
3778 (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
3779 (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
3784 limited_dig = false;
3787 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
3789 coex_dm->limited_dig = limited_dig;
3790 btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
3792 halbtc8192e2ant_run_coexist_mechanism(btcoexist);
3795 void ex_halbtc8192e2ant_stack_operation_notify(struct btc_coexist *btcoexist,
3800 void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
3802 BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, "[BTCoex], Halt notify\n");
3804 halbtc8192e2ant_IgnoreWlanAct(btcoexist, FORCE_EXEC, true);
3805 ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
3808 void ex_halbtc8192e2ant_periodical(struct btc_coexist *btcoexist)
3810 static u8 dis_ver_info_cnt;
3811 u32 fw_ver = 0, bt_patch_ver = 0;
3812 struct btc_board_info *board_info = &btcoexist->board_info;
3813 struct btc_stack_info *stack_info = &btcoexist->stack_info;
3815 BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
3816 "=======================Periodical=======================\n");
3817 if (dis_ver_info_cnt <= 5) {
3818 dis_ver_info_cnt += 1;
3819 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3820 "************************************************\n");
3821 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3822 "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
3823 board_info->pg_ant_num, board_info->btdm_ant_num,
3824 board_info->btdm_ant_pos);
3825 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3826 "BT stack/ hci ext ver = %s / %d\n",
3827 ((stack_info->profile_notified) ? "Yes" : "No"),
3828 stack_info->hci_version);
3829 btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
3831 btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
3832 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3833 "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
3834 glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
3835 fw_ver, bt_patch_ver, bt_patch_ver);
3836 BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
3837 "************************************************\n");
3840 #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
3841 halbtc8192e2ant_querybt_info(btcoexist);
3842 halbtc8192e2ant_monitor_bt_ctr(btcoexist);
3843 btc8192e2ant_monitor_bt_enable_dis(btcoexist);
3845 if (halbtc8192e2ant_iswifi_status_changed(btcoexist) ||
3846 coex_dm->auto_tdma_adjust)
3847 halbtc8192e2ant_run_coexist_mechanism(btcoexist);