2 * AMD 10Gb Ethernet driver
4 * This file is available to you under your choice of the following two
9 * Copyright (c) 2014 Advanced Micro Devices, Inc.
11 * This file is free software; you may copy, redistribute and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or (at
14 * your option) any later version.
16 * This file is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 * This file incorporates work covered by the following copyright and
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
31 * The Software IS NOT an item of Licensed Software or Licensed Product
32 * under any End User Software License Agreement or Agreement for Licensed
33 * Product with Synopsys or any supplement thereto. Permission is hereby
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54 * THE POSSIBILITY OF SUCH DAMAGE.
57 * License 2: Modified BSD
59 * Copyright (c) 2014 Advanced Micro Devices, Inc.
60 * All rights reserved.
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions are met:
64 * * Redistributions of source code must retain the above copyright
65 * notice, this list of conditions and the following disclaimer.
66 * * Redistributions in binary form must reproduce the above copyright
67 * notice, this list of conditions and the following disclaimer in the
68 * documentation and/or other materials provided with the distribution.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
70 * names of its contributors may be used to endorse or promote products
71 * derived from this software without specific prior written permission.
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84 * This file incorporates work covered by the following copyright and
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88 * Inc. unless otherwise expressly agreed to in writing between Synopsys
91 * The Software IS NOT an item of Licensed Software or Licensed Product
92 * under any End User Software License Agreement or Agreement for Licensed
93 * Product with Synopsys or any supplement thereto. Permission is hereby
94 * granted, free of charge, to any person obtaining a copy of this software
95 * annotated with this license and the Software, to deal in the Software
96 * without restriction, including without limitation the rights to use,
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98 * of the Software, and to permit persons to whom the Software is furnished
99 * to do so, subject to the following conditions:
101 * The above copyright notice and this permission notice shall be included
102 * in all copies or substantial portions of the Software.
104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114 * THE POSSIBILITY OF SUCH DAMAGE.
120 #include <linux/dma-mapping.h>
121 #include <linux/netdevice.h>
122 #include <linux/workqueue.h>
123 #include <linux/phy.h>
124 #include <linux/if_vlan.h>
125 #include <linux/bitops.h>
126 #include <linux/ptp_clock_kernel.h>
127 #include <linux/timecounter.h>
128 #include <linux/net_tstamp.h>
129 #include <net/dcbnl.h>
131 #define XGBE_DRV_NAME "amd-xgbe"
132 #define XGBE_DRV_VERSION "1.0.0-a"
133 #define XGBE_DRV_DESC "AMD 10 Gigabit Ethernet Driver"
135 /* Descriptor related defines */
136 #define XGBE_TX_DESC_CNT 512
137 #define XGBE_TX_DESC_MIN_FREE (XGBE_TX_DESC_CNT >> 3)
138 #define XGBE_TX_DESC_MAX_PROC (XGBE_TX_DESC_CNT >> 1)
139 #define XGBE_RX_DESC_CNT 512
141 #define XGBE_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
143 /* Descriptors required for maximum contigous TSO/GSO packet */
144 #define XGBE_TX_MAX_SPLIT ((GSO_MAX_SIZE / XGBE_TX_MAX_BUF_SIZE) + 1)
146 /* Maximum possible descriptors needed for an SKB:
147 * - Maximum number of SKB frags
148 * - Maximum descriptors for contiguous TSO/GSO packet
149 * - Possible context descriptor
150 * - Possible TSO header descriptor
152 #define XGBE_TX_MAX_DESCS (MAX_SKB_FRAGS + XGBE_TX_MAX_SPLIT + 2)
154 #define XGBE_RX_MIN_BUF_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
155 #define XGBE_RX_BUF_ALIGN 64
156 #define XGBE_SKB_ALLOC_SIZE 256
157 #define XGBE_SPH_HDSMS_SIZE 2 /* Keep in sync with SKB_ALLOC_SIZE */
159 #define XGBE_MAX_DMA_CHANNELS 16
160 #define XGBE_MAX_QUEUES 16
161 #define XGBE_DMA_STOP_TIMEOUT 5
163 /* DMA cache settings - Outer sharable, write-back, write-allocate */
164 #define XGBE_DMA_OS_AXDOMAIN 0x2
165 #define XGBE_DMA_OS_ARCACHE 0xb
166 #define XGBE_DMA_OS_AWCACHE 0xf
168 /* DMA cache settings - System, no caches used */
169 #define XGBE_DMA_SYS_AXDOMAIN 0x3
170 #define XGBE_DMA_SYS_ARCACHE 0x0
171 #define XGBE_DMA_SYS_AWCACHE 0x0
173 #define XGBE_DMA_INTERRUPT_MASK 0x31c7
175 #define XGMAC_MIN_PACKET 60
176 #define XGMAC_STD_PACKET_MTU 1500
177 #define XGMAC_MAX_STD_PACKET 1518
178 #define XGMAC_JUMBO_PACKET_MTU 9000
179 #define XGMAC_MAX_JUMBO_PACKET 9018
181 /* MDIO bus phy name */
182 #define XGBE_PHY_NAME "amd_xgbe_phy"
185 /* Common property names */
186 #define XGBE_MAC_ADDR_PROPERTY "mac-address"
187 #define XGBE_PHY_MODE_PROPERTY "phy-mode"
188 #define XGBE_DMA_IRQS_PROPERTY "amd,per-channel-interrupt"
190 /* Device-tree clock names */
191 #define XGBE_DMA_CLOCK "dma_clk"
192 #define XGBE_PTP_CLOCK "ptp_clk"
194 /* ACPI property names */
195 #define XGBE_ACPI_DMA_FREQ "amd,dma-freq"
196 #define XGBE_ACPI_PTP_FREQ "amd,ptp-freq"
198 /* Timestamp support - values based on 50MHz PTP clock
201 #define XGBE_TSTAMP_SSINC 20
202 #define XGBE_TSTAMP_SNSINC 0
204 /* Driver PMT macros */
205 #define XGMAC_DRIVER_CONTEXT 1
206 #define XGMAC_IOCTL_CONTEXT 2
208 #define XGBE_FIFO_MAX 81920
209 #define XGBE_FIFO_SIZE_B(x) (x)
210 #define XGBE_FIFO_SIZE_KB(x) (x * 1024)
212 #define XGBE_TC_MIN_QUANTUM 10
214 /* Helper macro for descriptor handling
215 * Always use XGBE_GET_DESC_DATA to access the descriptor data
216 * since the index is free-running and needs to be and-ed
217 * with the descriptor count value of the ring to index to
218 * the proper descriptor data.
220 #define XGBE_GET_DESC_DATA(_ring, _idx) \
222 ((_idx) & ((_ring)->rdesc_count - 1)))
224 /* Default coalescing parameters */
225 #define XGMAC_INIT_DMA_TX_USECS 1000
226 #define XGMAC_INIT_DMA_TX_FRAMES 25
228 #define XGMAC_MAX_DMA_RIWT 0xff
229 #define XGMAC_INIT_DMA_RX_USECS 30
230 #define XGMAC_INIT_DMA_RX_FRAMES 25
232 /* Flow control queue count */
233 #define XGMAC_MAX_FLOW_CONTROL_QUEUES 8
235 /* Maximum MAC address hash table size (256 bits = 8 bytes) */
236 #define XGBE_MAC_HASH_TABLE_SIZE 8
238 /* Receive Side Scaling */
239 #define XGBE_RSS_HASH_KEY_SIZE 40
240 #define XGBE_RSS_MAX_TABLE_SIZE 256
241 #define XGBE_RSS_LOOKUP_TABLE_TYPE 0
242 #define XGBE_RSS_HASH_KEY_TYPE 1
244 struct xgbe_prv_data;
246 struct xgbe_packet_data {
249 unsigned int attributes;
253 unsigned int rdesc_count;
256 unsigned int header_len;
257 unsigned int tcp_header_len;
258 unsigned int tcp_payload_len;
261 unsigned short vlan_ctag;
266 enum pkt_hash_types rss_hash_type;
268 unsigned int tx_packets;
269 unsigned int tx_bytes;
272 /* Common Rx and Tx descriptor mapping */
273 struct xgbe_ring_desc {
280 /* Page allocation related values */
281 struct xgbe_page_alloc {
283 unsigned int pages_len;
284 unsigned int pages_offset;
286 dma_addr_t pages_dma;
289 /* Ring entry buffer data */
290 struct xgbe_buffer_data {
291 struct xgbe_page_alloc pa;
292 struct xgbe_page_alloc pa_unmap;
295 unsigned int dma_len;
298 /* Tx-related ring data */
299 struct xgbe_tx_ring_data {
300 unsigned int packets; /* BQL packet count */
301 unsigned int bytes; /* BQL byte count */
304 /* Rx-related ring data */
305 struct xgbe_rx_ring_data {
306 struct xgbe_buffer_data hdr; /* Header locations */
307 struct xgbe_buffer_data buf; /* Payload locations */
309 unsigned short hdr_len; /* Length of received header */
310 unsigned short len; /* Length of received packet */
313 /* Structure used to hold information related to the descriptor
314 * and the packet associated with the descriptor (always use
315 * use the XGBE_GET_DESC_DATA macro to access this data from the ring)
317 struct xgbe_ring_data {
318 struct xgbe_ring_desc *rdesc; /* Virtual address of descriptor */
319 dma_addr_t rdesc_dma; /* DMA address of descriptor */
321 struct sk_buff *skb; /* Virtual address of SKB */
322 dma_addr_t skb_dma; /* DMA address of SKB data */
323 unsigned int skb_dma_len; /* Length of SKB DMA area */
325 struct xgbe_tx_ring_data tx; /* Tx-related data */
326 struct xgbe_rx_ring_data rx; /* Rx-related data */
328 unsigned int mapped_as_page;
330 /* Incomplete receive save location. If the budget is exhausted
331 * or the last descriptor (last normal descriptor or a following
332 * context descriptor) has not been DMA'd yet the current state
333 * of the receive processing needs to be saved.
335 unsigned int state_saved;
337 unsigned int incomplete;
338 unsigned int context_next;
346 /* Ring lock - used just for TX rings at the moment */
349 /* Per packet related information */
350 struct xgbe_packet_data packet_data;
352 /* Virtual/DMA addresses and count of allocated descriptor memory */
353 struct xgbe_ring_desc *rdesc;
354 dma_addr_t rdesc_dma;
355 unsigned int rdesc_count;
357 /* Array of descriptor data corresponding the descriptor memory
358 * (always use the XGBE_GET_DESC_DATA macro to access this data)
360 struct xgbe_ring_data *rdata;
362 /* Page allocation for RX buffers */
363 struct xgbe_page_alloc rx_hdr_pa;
364 struct xgbe_page_alloc rx_buf_pa;
367 * cur - Tx: index of descriptor to be used for current transfer
368 * Rx: index of descriptor to check for packet availability
369 * dirty - Tx: index of descriptor to check for transfer complete
370 * Rx: index of descriptor to check for buffer reallocation
375 /* Coalesce frame count used for interrupt bit setting */
376 unsigned int coalesce_count;
380 unsigned int queue_stopped;
381 unsigned int xmit_more;
382 unsigned short cur_mss;
383 unsigned short cur_vlan_ctag;
386 } ____cacheline_aligned;
388 /* Structure used to describe the descriptor rings associated with
391 struct xgbe_channel {
394 /* Address of private data area for device */
395 struct xgbe_prv_data *pdata;
397 /* Queue index and base address of queue's DMA registers */
398 unsigned int queue_index;
399 void __iomem *dma_regs;
401 /* Per channel interrupt irq number */
403 char dma_irq_name[IFNAMSIZ + 32];
405 /* Netdev related settings */
406 struct napi_struct napi;
408 unsigned int saved_ier;
410 unsigned int tx_timer_active;
411 struct timer_list tx_timer;
413 struct xgbe_ring *tx_ring;
414 struct xgbe_ring *rx_ring;
415 } ____cacheline_aligned;
418 XGMAC_INT_DMA_CH_SR_TI,
419 XGMAC_INT_DMA_CH_SR_TPS,
420 XGMAC_INT_DMA_CH_SR_TBU,
421 XGMAC_INT_DMA_CH_SR_RI,
422 XGMAC_INT_DMA_CH_SR_RBU,
423 XGMAC_INT_DMA_CH_SR_RPS,
424 XGMAC_INT_DMA_CH_SR_TI_RI,
425 XGMAC_INT_DMA_CH_SR_FBE,
429 enum xgbe_int_state {
430 XGMAC_INT_STATE_SAVE,
431 XGMAC_INT_STATE_RESTORE,
434 enum xgbe_mtl_fifo_size {
435 XGMAC_MTL_FIFO_SIZE_256 = 0x00,
436 XGMAC_MTL_FIFO_SIZE_512 = 0x01,
437 XGMAC_MTL_FIFO_SIZE_1K = 0x03,
438 XGMAC_MTL_FIFO_SIZE_2K = 0x07,
439 XGMAC_MTL_FIFO_SIZE_4K = 0x0f,
440 XGMAC_MTL_FIFO_SIZE_8K = 0x1f,
441 XGMAC_MTL_FIFO_SIZE_16K = 0x3f,
442 XGMAC_MTL_FIFO_SIZE_32K = 0x7f,
443 XGMAC_MTL_FIFO_SIZE_64K = 0xff,
444 XGMAC_MTL_FIFO_SIZE_128K = 0x1ff,
445 XGMAC_MTL_FIFO_SIZE_256K = 0x3ff,
448 struct xgbe_mmc_stats {
452 u64 txbroadcastframes_g;
453 u64 txmulticastframes_g;
455 u64 tx65to127octets_gb;
456 u64 tx128to255octets_gb;
457 u64 tx256to511octets_gb;
458 u64 tx512to1023octets_gb;
459 u64 tx1024tomaxoctets_gb;
460 u64 txunicastframes_gb;
461 u64 txmulticastframes_gb;
462 u64 txbroadcastframes_gb;
463 u64 txunderflowerror;
473 u64 rxbroadcastframes_g;
474 u64 rxmulticastframes_g;
481 u64 rx65to127octets_gb;
482 u64 rx128to255octets_gb;
483 u64 rx256to511octets_gb;
484 u64 rx512to1023octets_gb;
485 u64 rx1024tomaxoctets_gb;
486 u64 rxunicastframes_g;
488 u64 rxoutofrangetype;
496 int (*tx_complete)(struct xgbe_ring_desc *);
498 int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
499 int (*config_rx_mode)(struct xgbe_prv_data *);
501 int (*enable_rx_csum)(struct xgbe_prv_data *);
502 int (*disable_rx_csum)(struct xgbe_prv_data *);
504 int (*enable_rx_vlan_stripping)(struct xgbe_prv_data *);
505 int (*disable_rx_vlan_stripping)(struct xgbe_prv_data *);
506 int (*enable_rx_vlan_filtering)(struct xgbe_prv_data *);
507 int (*disable_rx_vlan_filtering)(struct xgbe_prv_data *);
508 int (*update_vlan_hash_table)(struct xgbe_prv_data *);
510 int (*read_mmd_regs)(struct xgbe_prv_data *, int, int);
511 void (*write_mmd_regs)(struct xgbe_prv_data *, int, int, int);
512 int (*set_gmii_speed)(struct xgbe_prv_data *);
513 int (*set_gmii_2500_speed)(struct xgbe_prv_data *);
514 int (*set_xgmii_speed)(struct xgbe_prv_data *);
516 void (*enable_tx)(struct xgbe_prv_data *);
517 void (*disable_tx)(struct xgbe_prv_data *);
518 void (*enable_rx)(struct xgbe_prv_data *);
519 void (*disable_rx)(struct xgbe_prv_data *);
521 void (*powerup_tx)(struct xgbe_prv_data *);
522 void (*powerdown_tx)(struct xgbe_prv_data *);
523 void (*powerup_rx)(struct xgbe_prv_data *);
524 void (*powerdown_rx)(struct xgbe_prv_data *);
526 int (*init)(struct xgbe_prv_data *);
527 int (*exit)(struct xgbe_prv_data *);
529 int (*enable_int)(struct xgbe_channel *, enum xgbe_int);
530 int (*disable_int)(struct xgbe_channel *, enum xgbe_int);
531 void (*dev_xmit)(struct xgbe_channel *);
532 int (*dev_read)(struct xgbe_channel *);
533 void (*tx_desc_init)(struct xgbe_channel *);
534 void (*rx_desc_init)(struct xgbe_channel *);
535 void (*tx_desc_reset)(struct xgbe_ring_data *);
536 void (*rx_desc_reset)(struct xgbe_prv_data *, struct xgbe_ring_data *,
538 int (*is_last_desc)(struct xgbe_ring_desc *);
539 int (*is_context_desc)(struct xgbe_ring_desc *);
540 void (*tx_start_xmit)(struct xgbe_channel *, struct xgbe_ring *);
543 int (*config_tx_flow_control)(struct xgbe_prv_data *);
544 int (*config_rx_flow_control)(struct xgbe_prv_data *);
546 /* For RX coalescing */
547 int (*config_rx_coalesce)(struct xgbe_prv_data *);
548 int (*config_tx_coalesce)(struct xgbe_prv_data *);
549 unsigned int (*usec_to_riwt)(struct xgbe_prv_data *, unsigned int);
550 unsigned int (*riwt_to_usec)(struct xgbe_prv_data *, unsigned int);
552 /* For RX and TX threshold config */
553 int (*config_rx_threshold)(struct xgbe_prv_data *, unsigned int);
554 int (*config_tx_threshold)(struct xgbe_prv_data *, unsigned int);
556 /* For RX and TX Store and Forward Mode config */
557 int (*config_rsf_mode)(struct xgbe_prv_data *, unsigned int);
558 int (*config_tsf_mode)(struct xgbe_prv_data *, unsigned int);
560 /* For TX DMA Operate on Second Frame config */
561 int (*config_osp_mode)(struct xgbe_prv_data *);
563 /* For RX and TX PBL config */
564 int (*config_rx_pbl_val)(struct xgbe_prv_data *);
565 int (*get_rx_pbl_val)(struct xgbe_prv_data *);
566 int (*config_tx_pbl_val)(struct xgbe_prv_data *);
567 int (*get_tx_pbl_val)(struct xgbe_prv_data *);
568 int (*config_pblx8)(struct xgbe_prv_data *);
570 /* For MMC statistics */
571 void (*rx_mmc_int)(struct xgbe_prv_data *);
572 void (*tx_mmc_int)(struct xgbe_prv_data *);
573 void (*read_mmc_stats)(struct xgbe_prv_data *);
575 /* For Timestamp config */
576 int (*config_tstamp)(struct xgbe_prv_data *, unsigned int);
577 void (*update_tstamp_addend)(struct xgbe_prv_data *, unsigned int);
578 void (*set_tstamp_time)(struct xgbe_prv_data *, unsigned int sec,
580 u64 (*get_tstamp_time)(struct xgbe_prv_data *);
581 u64 (*get_tx_tstamp)(struct xgbe_prv_data *);
583 /* For Data Center Bridging config */
584 void (*config_dcb_tc)(struct xgbe_prv_data *);
585 void (*config_dcb_pfc)(struct xgbe_prv_data *);
587 /* For Receive Side Scaling */
588 int (*enable_rss)(struct xgbe_prv_data *);
589 int (*disable_rss)(struct xgbe_prv_data *);
590 int (*set_rss_hash_key)(struct xgbe_prv_data *, const u8 *);
591 int (*set_rss_lookup_table)(struct xgbe_prv_data *, const u32 *);
594 struct xgbe_desc_if {
595 int (*alloc_ring_resources)(struct xgbe_prv_data *);
596 void (*free_ring_resources)(struct xgbe_prv_data *);
597 int (*map_tx_skb)(struct xgbe_channel *, struct sk_buff *);
598 int (*map_rx_buffer)(struct xgbe_prv_data *, struct xgbe_ring *,
599 struct xgbe_ring_data *);
600 void (*unmap_rdata)(struct xgbe_prv_data *, struct xgbe_ring_data *);
601 void (*wrapper_tx_desc_init)(struct xgbe_prv_data *);
602 void (*wrapper_rx_desc_init)(struct xgbe_prv_data *);
605 /* This structure contains flags that indicate what hardware features
606 * or configurations are present in the device.
608 struct xgbe_hw_features {
610 unsigned int version;
612 /* HW Feature Register0 */
613 unsigned int gmii; /* 1000 Mbps support */
614 unsigned int vlhash; /* VLAN Hash Filter */
615 unsigned int sma; /* SMA(MDIO) Interface */
616 unsigned int rwk; /* PMT remote wake-up packet */
617 unsigned int mgk; /* PMT magic packet */
618 unsigned int mmc; /* RMON module */
619 unsigned int aoe; /* ARP Offload */
620 unsigned int ts; /* IEEE 1588-2008 Advanced Timestamp */
621 unsigned int eee; /* Energy Efficient Ethernet */
622 unsigned int tx_coe; /* Tx Checksum Offload */
623 unsigned int rx_coe; /* Rx Checksum Offload */
624 unsigned int addn_mac; /* Additional MAC Addresses */
625 unsigned int ts_src; /* Timestamp Source */
626 unsigned int sa_vlan_ins; /* Source Address or VLAN Insertion */
628 /* HW Feature Register1 */
629 unsigned int rx_fifo_size; /* MTL Receive FIFO Size */
630 unsigned int tx_fifo_size; /* MTL Transmit FIFO Size */
631 unsigned int adv_ts_hi; /* Advance Timestamping High Word */
632 unsigned int dma_width; /* DMA width */
633 unsigned int dcb; /* DCB Feature */
634 unsigned int sph; /* Split Header Feature */
635 unsigned int tso; /* TCP Segmentation Offload */
636 unsigned int dma_debug; /* DMA Debug Registers */
637 unsigned int rss; /* Receive Side Scaling */
638 unsigned int tc_cnt; /* Number of Traffic Classes */
639 unsigned int hash_table_size; /* Hash Table Size */
640 unsigned int l3l4_filter_num; /* Number of L3-L4 Filters */
642 /* HW Feature Register2 */
643 unsigned int rx_q_cnt; /* Number of MTL Receive Queues */
644 unsigned int tx_q_cnt; /* Number of MTL Transmit Queues */
645 unsigned int rx_ch_cnt; /* Number of DMA Receive Channels */
646 unsigned int tx_ch_cnt; /* Number of DMA Transmit Channels */
647 unsigned int pps_out_num; /* Number of PPS outputs */
648 unsigned int aux_snap_num; /* Number of Aux snapshot inputs */
651 struct xgbe_prv_data {
652 struct net_device *netdev;
653 struct platform_device *pdev;
654 struct acpi_device *adev;
657 /* ACPI or DT flag */
658 unsigned int use_acpi;
660 /* XGMAC/XPCS related mmio registers */
661 void __iomem *xgmac_regs; /* XGMAC CSRs */
662 void __iomem *xpcs_regs; /* XPCS MMD registers */
664 /* Overall device lock */
667 /* XPCS indirect addressing mutex */
668 struct mutex xpcs_mutex;
670 /* RSS addressing mutex */
671 struct mutex rss_mutex;
674 unsigned int per_channel_irq;
676 struct xgbe_hw_if hw_if;
677 struct xgbe_desc_if desc_if;
679 /* AXI DMA settings */
680 unsigned int coherent;
681 unsigned int axdomain;
682 unsigned int arcache;
683 unsigned int awcache;
685 /* Rings for Tx/Rx on a DMA channel */
686 struct xgbe_channel *channel;
687 unsigned int channel_count;
688 unsigned int tx_ring_count;
689 unsigned int tx_desc_count;
690 unsigned int rx_ring_count;
691 unsigned int rx_desc_count;
693 unsigned int tx_q_count;
694 unsigned int rx_q_count;
696 /* Tx/Rx common settings */
700 unsigned int tx_sf_mode;
701 unsigned int tx_threshold;
703 unsigned int tx_osp_mode;
706 unsigned int rx_sf_mode;
707 unsigned int rx_threshold;
710 /* Tx coalescing settings */
711 unsigned int tx_usecs;
712 unsigned int tx_frames;
714 /* Rx coalescing settings */
715 unsigned int rx_riwt;
716 unsigned int rx_usecs;
717 unsigned int rx_frames;
719 /* Current Rx buffer size */
720 unsigned int rx_buf_size;
722 /* Flow control settings */
723 unsigned int pause_autoneg;
724 unsigned int tx_pause;
725 unsigned int rx_pause;
727 /* Receive Side Scaling settings */
728 u8 rss_key[XGBE_RSS_HASH_KEY_SIZE];
729 u32 rss_table[XGBE_RSS_MAX_TABLE_SIZE];
733 struct module *phy_module;
737 struct phy_device *phydev;
741 /* Current PHY settings */
742 phy_interface_t phy_mode;
745 unsigned int phy_tx_pause;
746 unsigned int phy_rx_pause;
748 /* Netdev related settings */
749 unsigned char mac_addr[ETH_ALEN];
750 netdev_features_t netdev_features;
751 struct napi_struct napi;
752 struct xgbe_mmc_stats mmc_stats;
754 /* Filtering support */
755 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
759 unsigned long sysclk_rate;
761 unsigned long ptpclk_rate;
763 /* Timestamp support */
764 spinlock_t tstamp_lock;
765 struct ptp_clock_info ptp_clock_info;
766 struct ptp_clock *ptp_clock;
767 struct hwtstamp_config tstamp_config;
768 struct cyclecounter tstamp_cc;
769 struct timecounter tstamp_tc;
770 unsigned int tstamp_addend;
771 struct work_struct tx_tstamp_work;
772 struct sk_buff *tx_tstamp_skb;
776 struct ieee_ets *ets;
777 struct ieee_pfc *pfc;
778 unsigned int q2tc_map[XGBE_MAX_QUEUES];
779 unsigned int prio2q_map[IEEE_8021QAZ_MAX_TCS];
781 /* Hardware features of the device */
782 struct xgbe_hw_features hw_feat;
784 /* Device restart work structure */
785 struct work_struct restart_work;
787 /* Keeps track of power mode */
788 unsigned int power_down;
790 #ifdef CONFIG_DEBUG_FS
791 struct dentry *xgbe_debugfs;
793 unsigned int debugfs_xgmac_reg;
795 unsigned int debugfs_xpcs_mmd;
796 unsigned int debugfs_xpcs_reg;
800 /* Function prototypes*/
802 void xgbe_init_function_ptrs_dev(struct xgbe_hw_if *);
803 void xgbe_init_function_ptrs_desc(struct xgbe_desc_if *);
804 struct net_device_ops *xgbe_get_netdev_ops(void);
805 struct ethtool_ops *xgbe_get_ethtool_ops(void);
806 #ifdef CONFIG_AMD_XGBE_DCB
807 const struct dcbnl_rtnl_ops *xgbe_get_dcbnl_ops(void);
810 int xgbe_mdio_register(struct xgbe_prv_data *);
811 void xgbe_mdio_unregister(struct xgbe_prv_data *);
812 void xgbe_dump_phy_registers(struct xgbe_prv_data *);
813 void xgbe_ptp_register(struct xgbe_prv_data *);
814 void xgbe_ptp_unregister(struct xgbe_prv_data *);
815 void xgbe_dump_tx_desc(struct xgbe_ring *, unsigned int, unsigned int,
817 void xgbe_dump_rx_desc(struct xgbe_ring *, struct xgbe_ring_desc *,
819 void xgbe_print_pkt(struct net_device *, struct sk_buff *, bool);
820 void xgbe_get_all_hw_features(struct xgbe_prv_data *);
821 int xgbe_powerup(struct net_device *, unsigned int);
822 int xgbe_powerdown(struct net_device *, unsigned int);
823 void xgbe_init_rx_coalesce(struct xgbe_prv_data *);
824 void xgbe_init_tx_coalesce(struct xgbe_prv_data *);
826 #ifdef CONFIG_DEBUG_FS
827 void xgbe_debugfs_init(struct xgbe_prv_data *);
828 void xgbe_debugfs_exit(struct xgbe_prv_data *);
830 static inline void xgbe_debugfs_init(struct xgbe_prv_data *pdata) {}
831 static inline void xgbe_debugfs_exit(struct xgbe_prv_data *pdata) {}
832 #endif /* CONFIG_DEBUG_FS */
834 /* NOTE: Uncomment for TX and RX DESCRIPTOR DUMP in KERNEL LOG */
836 #define XGMAC_ENABLE_TX_DESC_DUMP
837 #define XGMAC_ENABLE_RX_DESC_DUMP
840 /* NOTE: Uncomment for TX and RX PACKET DUMP in KERNEL LOG */
842 #define XGMAC_ENABLE_TX_PKT_DUMP
843 #define XGMAC_ENABLE_RX_PKT_DUMP
846 /* NOTE: Uncomment for function trace log messages in KERNEL LOG */
852 /* For debug prints */
854 #define DBGPR(x...) pr_alert(x)
855 #define DBGPHY_REGS(x...) xgbe_dump_phy_registers(x)
857 #define DBGPR(x...) do { } while (0)
858 #define DBGPHY_REGS(x...) do { } while (0)
862 #define DBGPR_MDIO(x...) pr_alert(x)
864 #define DBGPR_MDIO(x...) do { } while (0)