3 * Intel Management Engine Interface (Intel MEI) Linux driver
4 * Copyright (c) 2003-2012, Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/kernel.h>
19 #include <linux/device.h>
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <linux/fcntl.h>
24 #include <linux/pci.h>
25 #include <linux/poll.h>
26 #include <linux/ioctl.h>
27 #include <linux/cdev.h>
28 #include <linux/sched.h>
29 #include <linux/uuid.h>
30 #include <linux/compat.h>
31 #include <linux/jiffies.h>
32 #include <linux/interrupt.h>
34 #include <linux/pm_runtime.h>
36 #include <linux/mei.h>
40 #include "hw-me-regs.h"
43 /* mei_pci_tbl - PCI Device ID Table */
44 static const struct pci_device_id mei_me_pci_tbl[] = {
45 {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
46 {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
47 {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
48 {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
49 {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
50 {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
51 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
52 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
53 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
54 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
55 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
57 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
58 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
59 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
60 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
61 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
62 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
63 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
64 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
65 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
66 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
67 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
68 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
69 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
71 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
72 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
73 {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
74 {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
75 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
76 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
78 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
79 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
82 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
83 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
85 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
86 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
87 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
88 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
90 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)},
91 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)},
93 /* required last entry */
97 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
100 static inline void mei_me_set_pm_domain(struct mei_device *dev);
101 static inline void mei_me_unset_pm_domain(struct mei_device *dev);
103 static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
104 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
105 #endif /* CONFIG_PM */
108 * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
110 * @pdev: PCI device structure
111 * @cfg: per generation config
113 * Return: true if ME Interface is valid, false otherwise
115 static bool mei_me_quirk_probe(struct pci_dev *pdev,
116 const struct mei_cfg *cfg)
118 if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
119 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
127 * mei_me_probe - Device Initialization Routine
129 * @pdev: PCI device structure
130 * @ent: entry in kcs_pci_tbl
132 * Return: 0 on success, <0 on failure.
134 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
136 const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
137 struct mei_device *dev;
138 struct mei_me_hw *hw;
139 unsigned int irqflags;
143 if (!mei_me_quirk_probe(pdev, cfg))
147 err = pci_enable_device(pdev);
149 dev_err(&pdev->dev, "failed to enable pci device.\n");
152 /* set PCI host mastering */
153 pci_set_master(pdev);
154 /* pci request regions for mei driver */
155 err = pci_request_regions(pdev, KBUILD_MODNAME);
157 dev_err(&pdev->dev, "failed to get pci regions.\n");
161 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
162 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
164 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
166 err = dma_set_coherent_mask(&pdev->dev,
170 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
171 goto release_regions;
175 /* allocates and initializes the mei dev structure */
176 dev = mei_me_dev_init(pdev, cfg);
179 goto release_regions;
182 /* mapping IO device memory */
183 hw->mem_addr = pci_iomap(pdev, 0, 0);
185 dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
189 pci_enable_msi(pdev);
191 /* request and enable interrupt */
192 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
194 err = request_threaded_irq(pdev->irq,
195 mei_me_irq_quick_handler,
196 mei_me_irq_thread_handler,
197 irqflags, KBUILD_MODNAME, dev);
199 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
204 if (mei_start(dev)) {
205 dev_err(&pdev->dev, "init hw failure.\n");
210 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
211 pm_runtime_use_autosuspend(&pdev->dev);
213 err = mei_register(dev, &pdev->dev);
217 pci_set_drvdata(pdev, dev);
219 schedule_delayed_work(&dev->timer_work, HZ);
222 * For not wake-able HW runtime pm framework
223 * can't be used on pci device level.
224 * Use domain runtime pm callbacks instead.
226 if (!pci_dev_run_wake(pdev))
227 mei_me_set_pm_domain(dev);
229 if (mei_pg_is_enabled(dev))
230 pm_runtime_put_noidle(&pdev->dev);
232 dev_dbg(&pdev->dev, "initialization successful.\n");
237 mei_cancel_work(dev);
238 mei_disable_interrupts(dev);
239 free_irq(pdev->irq, dev);
241 pci_disable_msi(pdev);
242 pci_iounmap(pdev, hw->mem_addr);
246 pci_release_regions(pdev);
248 pci_disable_device(pdev);
250 dev_err(&pdev->dev, "initialization failed.\n");
255 * mei_me_remove - Device Removal Routine
257 * @pdev: PCI device structure
259 * mei_remove is called by the PCI subsystem to alert the driver
260 * that it should release a PCI device.
262 static void mei_me_remove(struct pci_dev *pdev)
264 struct mei_device *dev;
265 struct mei_me_hw *hw;
267 dev = pci_get_drvdata(pdev);
271 if (mei_pg_is_enabled(dev))
272 pm_runtime_get_noresume(&pdev->dev);
277 dev_dbg(&pdev->dev, "stop\n");
280 if (!pci_dev_run_wake(pdev))
281 mei_me_unset_pm_domain(dev);
283 /* disable interrupts */
284 mei_disable_interrupts(dev);
286 free_irq(pdev->irq, dev);
287 pci_disable_msi(pdev);
290 pci_iounmap(pdev, hw->mem_addr);
296 pci_release_regions(pdev);
297 pci_disable_device(pdev);
301 #ifdef CONFIG_PM_SLEEP
302 static int mei_me_pci_suspend(struct device *device)
304 struct pci_dev *pdev = to_pci_dev(device);
305 struct mei_device *dev = pci_get_drvdata(pdev);
310 dev_dbg(&pdev->dev, "suspend\n");
314 mei_disable_interrupts(dev);
316 free_irq(pdev->irq, dev);
317 pci_disable_msi(pdev);
322 static int mei_me_pci_resume(struct device *device)
324 struct pci_dev *pdev = to_pci_dev(device);
325 struct mei_device *dev;
326 unsigned int irqflags;
329 dev = pci_get_drvdata(pdev);
333 pci_enable_msi(pdev);
335 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
337 /* request and enable interrupt */
338 err = request_threaded_irq(pdev->irq,
339 mei_me_irq_quick_handler,
340 mei_me_irq_thread_handler,
341 irqflags, KBUILD_MODNAME, dev);
344 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
349 err = mei_restart(dev);
353 /* Start timer if stopped in suspend */
354 schedule_delayed_work(&dev->timer_work, HZ);
358 #endif /* CONFIG_PM_SLEEP */
361 static int mei_me_pm_runtime_idle(struct device *device)
363 struct pci_dev *pdev = to_pci_dev(device);
364 struct mei_device *dev;
366 dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
368 dev = pci_get_drvdata(pdev);
371 if (mei_write_is_idle(dev))
372 pm_runtime_autosuspend(device);
377 static int mei_me_pm_runtime_suspend(struct device *device)
379 struct pci_dev *pdev = to_pci_dev(device);
380 struct mei_device *dev;
383 dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
385 dev = pci_get_drvdata(pdev);
389 mutex_lock(&dev->device_lock);
391 if (mei_write_is_idle(dev))
392 ret = mei_me_pg_enter_sync(dev);
396 mutex_unlock(&dev->device_lock);
398 dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
403 static int mei_me_pm_runtime_resume(struct device *device)
405 struct pci_dev *pdev = to_pci_dev(device);
406 struct mei_device *dev;
409 dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
411 dev = pci_get_drvdata(pdev);
415 mutex_lock(&dev->device_lock);
417 ret = mei_me_pg_exit_sync(dev);
419 mutex_unlock(&dev->device_lock);
421 dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
427 * mei_me_set_pm_domain - fill and set pm domain structure for device
431 static inline void mei_me_set_pm_domain(struct mei_device *dev)
433 struct pci_dev *pdev = to_pci_dev(dev->dev);
435 if (pdev->dev.bus && pdev->dev.bus->pm) {
436 dev->pg_domain.ops = *pdev->dev.bus->pm;
438 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
439 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
440 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
442 pdev->dev.pm_domain = &dev->pg_domain;
447 * mei_me_unset_pm_domain - clean pm domain structure for device
451 static inline void mei_me_unset_pm_domain(struct mei_device *dev)
453 /* stop using pm callbacks if any */
454 dev->dev->pm_domain = NULL;
457 static const struct dev_pm_ops mei_me_pm_ops = {
458 SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
461 mei_me_pm_runtime_suspend,
462 mei_me_pm_runtime_resume,
463 mei_me_pm_runtime_idle)
466 #define MEI_ME_PM_OPS (&mei_me_pm_ops)
468 #define MEI_ME_PM_OPS NULL
469 #endif /* CONFIG_PM */
471 * PCI driver structure
473 static struct pci_driver mei_me_driver = {
474 .name = KBUILD_MODNAME,
475 .id_table = mei_me_pci_tbl,
476 .probe = mei_me_probe,
477 .remove = mei_me_remove,
478 .shutdown = mei_me_remove,
479 .driver.pm = MEI_ME_PM_OPS,
482 module_pci_driver(mei_me_driver);
484 MODULE_AUTHOR("Intel Corporation");
485 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
486 MODULE_LICENSE("GPL v2");