1 /* This file is part of the Emulex RoCE Device Driver for
2 * RoCE (RDMA over Converged Ethernet) adapters.
3 * Copyright (C) 2012-2015 Emulex. All rights reserved.
4 * EMULEX and SLI are trademarks of Emulex.
7 * This software is available to you under a choice of one of two licenses.
8 * You may choose to be licensed under the terms of the GNU General Public
9 * License (GPL) Version 2, available from the file COPYING in the main
10 * directory of this source tree, or the BSD license below:
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
16 * - Redistributions of source code must retain the above copyright notice,
17 * this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the distribution.
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 * Contact Information:
36 * linux-drivers@emulex.com
40 * Costa Mesa, CA 92626
43 #include <linux/dma-mapping.h>
44 #include <rdma/ib_verbs.h>
45 #include <rdma/ib_user_verbs.h>
46 #include <rdma/iw_cm.h>
47 #include <rdma/ib_umem.h>
48 #include <rdma/ib_addr.h>
49 #include <rdma/ib_cache.h>
52 #include "ocrdma_hw.h"
53 #include "ocrdma_verbs.h"
54 #include "ocrdma_abi.h"
56 int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
65 int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
66 int index, union ib_gid *sgid)
69 struct ocrdma_dev *dev;
71 dev = get_ocrdma_dev(ibdev);
72 memset(sgid, 0, sizeof(*sgid));
73 if (index >= OCRDMA_MAX_SGID)
76 ret = ib_get_cached_gid(ibdev, port, index, sgid, NULL);
78 memcpy(sgid, &zgid, sizeof(*sgid));
85 int ocrdma_add_gid(struct ib_device *device,
88 const union ib_gid *gid,
89 const struct ib_gid_attr *attr,
94 int ocrdma_del_gid(struct ib_device *device,
101 int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr,
102 struct ib_udata *uhw)
104 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
106 if (uhw->inlen || uhw->outlen)
109 memset(attr, 0, sizeof *attr);
110 memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
111 min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
112 ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
113 attr->max_mr_size = dev->attr.max_mr_size;
114 attr->page_size_cap = 0xffff000;
115 attr->vendor_id = dev->nic_info.pdev->vendor;
116 attr->vendor_part_id = dev->nic_info.pdev->device;
117 attr->hw_ver = dev->asic_id;
118 attr->max_qp = dev->attr.max_qp;
119 attr->max_ah = OCRDMA_MAX_AH;
120 attr->max_qp_wr = dev->attr.max_wqe;
122 attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
123 IB_DEVICE_RC_RNR_NAK_GEN |
124 IB_DEVICE_SHUTDOWN_PORT |
125 IB_DEVICE_SYS_IMAGE_GUID |
126 IB_DEVICE_LOCAL_DMA_LKEY |
127 IB_DEVICE_MEM_MGT_EXTENSIONS;
128 attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
129 attr->max_sge_rd = 0;
130 attr->max_cq = dev->attr.max_cq;
131 attr->max_cqe = dev->attr.max_cqe;
132 attr->max_mr = dev->attr.max_mr;
133 attr->max_mw = dev->attr.max_mw;
134 attr->max_pd = dev->attr.max_pd;
135 attr->atomic_cap = 0;
137 attr->max_map_per_fmr = 0;
138 attr->max_qp_rd_atom =
139 min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
140 attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
141 attr->max_srq = dev->attr.max_srq;
142 attr->max_srq_sge = dev->attr.max_srq_sge;
143 attr->max_srq_wr = dev->attr.max_rqe;
144 attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
145 attr->max_fast_reg_page_list_len = dev->attr.max_pages_per_frmr;
150 struct net_device *ocrdma_get_netdev(struct ib_device *ibdev, u8 port_num)
152 struct ocrdma_dev *dev;
153 struct net_device *ndev = NULL;
157 dev = get_ocrdma_dev(ibdev);
159 ndev = dev->nic_info.netdev;
168 static inline void get_link_speed_and_width(struct ocrdma_dev *dev,
169 u8 *ib_speed, u8 *ib_width)
174 status = ocrdma_mbx_get_link_speed(dev, &speed, NULL);
176 speed = OCRDMA_PHYS_LINK_SPEED_ZERO;
179 case OCRDMA_PHYS_LINK_SPEED_1GBPS:
180 *ib_speed = IB_SPEED_SDR;
181 *ib_width = IB_WIDTH_1X;
184 case OCRDMA_PHYS_LINK_SPEED_10GBPS:
185 *ib_speed = IB_SPEED_QDR;
186 *ib_width = IB_WIDTH_1X;
189 case OCRDMA_PHYS_LINK_SPEED_20GBPS:
190 *ib_speed = IB_SPEED_DDR;
191 *ib_width = IB_WIDTH_4X;
194 case OCRDMA_PHYS_LINK_SPEED_40GBPS:
195 *ib_speed = IB_SPEED_QDR;
196 *ib_width = IB_WIDTH_4X;
201 *ib_speed = IB_SPEED_SDR;
202 *ib_width = IB_WIDTH_1X;
206 int ocrdma_query_port(struct ib_device *ibdev,
207 u8 port, struct ib_port_attr *props)
209 enum ib_port_state port_state;
210 struct ocrdma_dev *dev;
211 struct net_device *netdev;
213 dev = get_ocrdma_dev(ibdev);
215 pr_err("%s(%d) invalid_port=0x%x\n", __func__,
219 netdev = dev->nic_info.netdev;
220 if (netif_running(netdev) && netif_oper_up(netdev)) {
221 port_state = IB_PORT_ACTIVE;
222 props->phys_state = 5;
224 port_state = IB_PORT_DOWN;
225 props->phys_state = 3;
227 props->max_mtu = IB_MTU_4096;
228 props->active_mtu = iboe_get_mtu(netdev->mtu);
233 props->state = port_state;
234 props->port_cap_flags =
237 IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP |
238 IB_PORT_IP_BASED_GIDS;
239 props->gid_tbl_len = OCRDMA_MAX_SGID;
240 props->pkey_tbl_len = 1;
241 props->bad_pkey_cntr = 0;
242 props->qkey_viol_cntr = 0;
243 get_link_speed_and_width(dev, &props->active_speed,
244 &props->active_width);
245 props->max_msg_sz = 0x80000000;
246 props->max_vl_num = 4;
250 int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
251 struct ib_port_modify *props)
253 struct ocrdma_dev *dev;
255 dev = get_ocrdma_dev(ibdev);
257 pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
263 static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
266 struct ocrdma_mm *mm;
268 mm = kzalloc(sizeof(*mm), GFP_KERNEL);
271 mm->key.phy_addr = phy_addr;
273 INIT_LIST_HEAD(&mm->entry);
275 mutex_lock(&uctx->mm_list_lock);
276 list_add_tail(&mm->entry, &uctx->mm_head);
277 mutex_unlock(&uctx->mm_list_lock);
281 static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
284 struct ocrdma_mm *mm, *tmp;
286 mutex_lock(&uctx->mm_list_lock);
287 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
288 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
291 list_del(&mm->entry);
295 mutex_unlock(&uctx->mm_list_lock);
298 static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
302 struct ocrdma_mm *mm;
304 mutex_lock(&uctx->mm_list_lock);
305 list_for_each_entry(mm, &uctx->mm_head, entry) {
306 if (len != mm->key.len && phy_addr != mm->key.phy_addr)
312 mutex_unlock(&uctx->mm_list_lock);
317 static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool)
319 u16 pd_bitmap_idx = 0;
320 const unsigned long *pd_bitmap;
323 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap;
324 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
325 dev->pd_mgr->max_dpp_pd);
326 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap);
327 dev->pd_mgr->pd_dpp_count++;
328 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh)
329 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count;
331 pd_bitmap = dev->pd_mgr->pd_norm_bitmap;
332 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
333 dev->pd_mgr->max_normal_pd);
334 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap);
335 dev->pd_mgr->pd_norm_count++;
336 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh)
337 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count;
339 return pd_bitmap_idx;
342 static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id,
348 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count :
349 dev->pd_mgr->pd_norm_count;
354 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start;
355 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) {
358 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap);
359 dev->pd_mgr->pd_dpp_count--;
362 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start;
363 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) {
366 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap);
367 dev->pd_mgr->pd_norm_count--;
374 static u8 ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id,
379 mutex_lock(&dev->dev_lock);
380 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool);
381 mutex_unlock(&dev->dev_lock);
385 static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
390 mutex_lock(&dev->dev_lock);
391 if (pd->dpp_enabled) {
392 /* try allocating DPP PD, if not available then normal PD */
393 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) {
394 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true);
395 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx;
396 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx;
397 } else if (dev->pd_mgr->pd_norm_count <
398 dev->pd_mgr->max_normal_pd) {
399 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
400 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
401 pd->dpp_enabled = false;
406 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) {
407 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
408 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
413 mutex_unlock(&dev->dev_lock);
417 static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
418 struct ocrdma_ucontext *uctx,
419 struct ib_udata *udata)
421 struct ocrdma_pd *pd = NULL;
424 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
426 return ERR_PTR(-ENOMEM);
428 if (udata && uctx && dev->attr.max_dpp_pds) {
430 ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R;
432 pd->dpp_enabled ? (dev->nic_info.db_page_size /
433 dev->attr.wqe_size) : 0;
436 if (dev->pd_mgr->pd_prealloc_valid) {
437 status = ocrdma_get_pd_num(dev, pd);
442 return ERR_PTR(status);
447 status = ocrdma_mbx_alloc_pd(dev, pd);
449 if (pd->dpp_enabled) {
450 pd->dpp_enabled = false;
455 return ERR_PTR(status);
462 static inline int is_ucontext_pd(struct ocrdma_ucontext *uctx,
463 struct ocrdma_pd *pd)
465 return (uctx->cntxt_pd == pd ? true : false);
468 static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
469 struct ocrdma_pd *pd)
473 if (dev->pd_mgr->pd_prealloc_valid)
474 status = ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled);
476 status = ocrdma_mbx_dealloc_pd(dev, pd);
482 static int ocrdma_alloc_ucontext_pd(struct ocrdma_dev *dev,
483 struct ocrdma_ucontext *uctx,
484 struct ib_udata *udata)
488 uctx->cntxt_pd = _ocrdma_alloc_pd(dev, uctx, udata);
489 if (IS_ERR(uctx->cntxt_pd)) {
490 status = PTR_ERR(uctx->cntxt_pd);
491 uctx->cntxt_pd = NULL;
495 uctx->cntxt_pd->uctx = uctx;
496 uctx->cntxt_pd->ibpd.device = &dev->ibdev;
501 static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
503 struct ocrdma_pd *pd = uctx->cntxt_pd;
504 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
506 if (uctx->pd_in_use) {
507 pr_err("%s(%d) Freeing in use pdid=0x%x.\n",
508 __func__, dev->id, pd->id);
510 uctx->cntxt_pd = NULL;
511 (void)_ocrdma_dealloc_pd(dev, pd);
515 static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
517 struct ocrdma_pd *pd = NULL;
519 mutex_lock(&uctx->mm_list_lock);
520 if (!uctx->pd_in_use) {
521 uctx->pd_in_use = true;
524 mutex_unlock(&uctx->mm_list_lock);
529 static void ocrdma_release_ucontext_pd(struct ocrdma_ucontext *uctx)
531 mutex_lock(&uctx->mm_list_lock);
532 uctx->pd_in_use = false;
533 mutex_unlock(&uctx->mm_list_lock);
536 struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
537 struct ib_udata *udata)
540 struct ocrdma_ucontext *ctx;
541 struct ocrdma_alloc_ucontext_resp resp;
542 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
543 struct pci_dev *pdev = dev->nic_info.pdev;
544 u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
547 return ERR_PTR(-EFAULT);
548 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
550 return ERR_PTR(-ENOMEM);
551 INIT_LIST_HEAD(&ctx->mm_head);
552 mutex_init(&ctx->mm_list_lock);
554 ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
555 &ctx->ah_tbl.pa, GFP_KERNEL);
556 if (!ctx->ah_tbl.va) {
558 return ERR_PTR(-ENOMEM);
560 memset(ctx->ah_tbl.va, 0, map_len);
561 ctx->ah_tbl.len = map_len;
563 memset(&resp, 0, sizeof(resp));
564 resp.ah_tbl_len = ctx->ah_tbl.len;
565 resp.ah_tbl_page = virt_to_phys(ctx->ah_tbl.va);
567 status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
571 status = ocrdma_alloc_ucontext_pd(dev, ctx, udata);
575 resp.dev_id = dev->id;
576 resp.max_inline_data = dev->attr.max_inline_data;
577 resp.wqe_size = dev->attr.wqe_size;
578 resp.rqe_size = dev->attr.rqe_size;
579 resp.dpp_wqe_size = dev->attr.wqe_size;
581 memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
582 status = ib_copy_to_udata(udata, &resp, sizeof(resp));
585 return &ctx->ibucontext;
589 ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
591 dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
594 return ERR_PTR(status);
597 int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
600 struct ocrdma_mm *mm, *tmp;
601 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
602 struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
603 struct pci_dev *pdev = dev->nic_info.pdev;
605 status = ocrdma_dealloc_ucontext_pd(uctx);
607 ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
608 dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
611 list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
612 list_del(&mm->entry);
619 int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
621 struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
622 struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
623 unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
624 u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
625 unsigned long len = (vma->vm_end - vma->vm_start);
629 if (vma->vm_start & (PAGE_SIZE - 1))
631 found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
635 if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
636 dev->nic_info.db_total_size)) &&
637 (len <= dev->nic_info.db_page_size)) {
638 if (vma->vm_flags & VM_READ)
641 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
642 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
643 len, vma->vm_page_prot);
644 } else if (dev->nic_info.dpp_unmapped_len &&
645 (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
646 (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
647 dev->nic_info.dpp_unmapped_len)) &&
648 (len <= dev->nic_info.dpp_unmapped_len)) {
649 if (vma->vm_flags & VM_READ)
652 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
653 status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
654 len, vma->vm_page_prot);
656 status = remap_pfn_range(vma, vma->vm_start,
657 vma->vm_pgoff, len, vma->vm_page_prot);
662 static int ocrdma_copy_pd_uresp(struct ocrdma_dev *dev, struct ocrdma_pd *pd,
663 struct ib_ucontext *ib_ctx,
664 struct ib_udata *udata)
668 u64 dpp_page_addr = 0;
670 struct ocrdma_alloc_pd_uresp rsp;
671 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
673 memset(&rsp, 0, sizeof(rsp));
675 rsp.dpp_enabled = pd->dpp_enabled;
676 db_page_addr = ocrdma_get_db_addr(dev, pd->id);
677 db_page_size = dev->nic_info.db_page_size;
679 status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
683 if (pd->dpp_enabled) {
684 dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
685 (pd->id * PAGE_SIZE);
686 status = ocrdma_add_mmap(uctx, dpp_page_addr,
690 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
691 rsp.dpp_page_addr_lo = dpp_page_addr;
694 status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
703 ocrdma_del_mmap(pd->uctx, dpp_page_addr, PAGE_SIZE);
705 ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
709 struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
710 struct ib_ucontext *context,
711 struct ib_udata *udata)
713 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
714 struct ocrdma_pd *pd;
715 struct ocrdma_ucontext *uctx = NULL;
717 u8 is_uctx_pd = false;
719 if (udata && context) {
720 uctx = get_ocrdma_ucontext(context);
721 pd = ocrdma_get_ucontext_pd(uctx);
728 pd = _ocrdma_alloc_pd(dev, uctx, udata);
730 status = PTR_ERR(pd);
735 if (udata && context) {
736 status = ocrdma_copy_pd_uresp(dev, pd, context, udata);
744 ocrdma_release_ucontext_pd(uctx);
746 status = _ocrdma_dealloc_pd(dev, pd);
749 return ERR_PTR(status);
752 int ocrdma_dealloc_pd(struct ib_pd *ibpd)
754 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
755 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
756 struct ocrdma_ucontext *uctx = NULL;
762 u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
763 (pd->id * PAGE_SIZE);
765 ocrdma_del_mmap(pd->uctx, dpp_db, PAGE_SIZE);
766 usr_db = ocrdma_get_db_addr(dev, pd->id);
767 ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
769 if (is_ucontext_pd(uctx, pd)) {
770 ocrdma_release_ucontext_pd(uctx);
774 status = _ocrdma_dealloc_pd(dev, pd);
778 static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
779 u32 pdid, int acc, u32 num_pbls, u32 addr_check)
784 mr->hwmr.local_rd = 1;
785 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
786 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
787 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
788 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
789 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
790 mr->hwmr.num_pbls = num_pbls;
792 status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
796 mr->ibmr.lkey = mr->hwmr.lkey;
797 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
798 mr->ibmr.rkey = mr->hwmr.lkey;
802 struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
805 struct ocrdma_mr *mr;
806 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
807 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
809 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
810 pr_err("%s err, invalid access rights\n", __func__);
811 return ERR_PTR(-EINVAL);
814 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
816 return ERR_PTR(-ENOMEM);
818 status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
819 OCRDMA_ADDR_CHECK_DISABLE);
822 return ERR_PTR(status);
828 static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
829 struct ocrdma_hw_mr *mr)
831 struct pci_dev *pdev = dev->nic_info.pdev;
835 for (i = 0; i < mr->num_pbls; i++) {
836 if (!mr->pbl_table[i].va)
838 dma_free_coherent(&pdev->dev, mr->pbl_size,
840 mr->pbl_table[i].pa);
842 kfree(mr->pbl_table);
843 mr->pbl_table = NULL;
847 static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
856 pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
857 if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
861 num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
862 num_pbls = num_pbls / (pbl_size / sizeof(u64));
864 } while (num_pbls >= dev->attr.max_num_mr_pbl);
866 mr->hwmr.num_pbes = num_pbes;
867 mr->hwmr.num_pbls = num_pbls;
868 mr->hwmr.pbl_size = pbl_size;
872 static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
876 u32 dma_len = mr->pbl_size;
877 struct pci_dev *pdev = dev->nic_info.pdev;
881 mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
882 mr->num_pbls, GFP_KERNEL);
887 for (i = 0; i < mr->num_pbls; i++) {
888 va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
890 ocrdma_free_mr_pbl_tbl(dev, mr);
894 memset(va, 0, dma_len);
895 mr->pbl_table[i].va = va;
896 mr->pbl_table[i].pa = pa;
901 static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
904 struct ocrdma_pbe *pbe;
905 struct scatterlist *sg;
906 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
907 struct ib_umem *umem = mr->umem;
908 int shift, pg_cnt, pages, pbe_cnt, entry, total_num_pbes = 0;
910 if (!mr->hwmr.num_pbes)
913 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
916 shift = ilog2(umem->page_size);
918 for_each_sg(umem->sg_head.sgl, sg, umem->nmap, entry) {
919 pages = sg_dma_len(sg) >> shift;
920 for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
921 /* store the page address in pbe */
923 cpu_to_le32(sg_dma_address
925 (umem->page_size * pg_cnt));
927 cpu_to_le32(upper_32_bits
930 umem->page_size * pg_cnt)));
935 /* if done building pbes, issue the mbx cmd. */
936 if (total_num_pbes == num_pbes)
939 /* if the given pbl is full storing the pbes,
943 (mr->hwmr.pbl_size / sizeof(u64))) {
945 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
953 struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
954 u64 usr_addr, int acc, struct ib_udata *udata)
956 int status = -ENOMEM;
957 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
958 struct ocrdma_mr *mr;
959 struct ocrdma_pd *pd;
962 pd = get_ocrdma_pd(ibpd);
964 if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
965 return ERR_PTR(-EINVAL);
967 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
969 return ERR_PTR(status);
970 mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
971 if (IS_ERR(mr->umem)) {
975 num_pbes = ib_umem_page_count(mr->umem);
976 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
980 mr->hwmr.pbe_size = mr->umem->page_size;
981 mr->hwmr.fbo = ib_umem_offset(mr->umem);
982 mr->hwmr.va = usr_addr;
984 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
985 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
986 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
987 mr->hwmr.local_rd = 1;
988 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
989 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
992 build_user_pbes(dev, mr, num_pbes);
993 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
996 mr->ibmr.lkey = mr->hwmr.lkey;
997 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
998 mr->ibmr.rkey = mr->hwmr.lkey;
1003 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
1006 return ERR_PTR(status);
1009 int ocrdma_dereg_mr(struct ib_mr *ib_mr)
1011 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
1012 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
1014 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
1017 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
1019 /* it could be user registered memory. */
1021 ib_umem_release(mr->umem);
1024 /* Don't stop cleanup, in case FW is unresponsive */
1025 if (dev->mqe_ctx.fw_error_state) {
1026 pr_err("%s(%d) fw not responding.\n",
1032 static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
1033 struct ib_udata *udata,
1034 struct ib_ucontext *ib_ctx)
1037 struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
1038 struct ocrdma_create_cq_uresp uresp;
1040 memset(&uresp, 0, sizeof(uresp));
1041 uresp.cq_id = cq->id;
1042 uresp.page_size = PAGE_ALIGN(cq->len);
1043 uresp.num_pages = 1;
1044 uresp.max_hw_cqe = cq->max_hw_cqe;
1045 uresp.page_addr[0] = virt_to_phys(cq->va);
1046 uresp.db_page_addr = ocrdma_get_db_addr(dev, uctx->cntxt_pd->id);
1047 uresp.db_page_size = dev->nic_info.db_page_size;
1048 uresp.phase_change = cq->phase_change ? 1 : 0;
1049 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1051 pr_err("%s(%d) copy error cqid=0x%x.\n",
1052 __func__, dev->id, cq->id);
1055 status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
1058 status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
1060 ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
1063 cq->ucontext = uctx;
1068 struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev,
1069 const struct ib_cq_init_attr *attr,
1070 struct ib_ucontext *ib_ctx,
1071 struct ib_udata *udata)
1073 int entries = attr->cqe;
1074 struct ocrdma_cq *cq;
1075 struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
1076 struct ocrdma_ucontext *uctx = NULL;
1079 struct ocrdma_create_cq_ureq ureq;
1082 return ERR_PTR(-EINVAL);
1085 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1086 return ERR_PTR(-EFAULT);
1089 cq = kzalloc(sizeof(*cq), GFP_KERNEL);
1091 return ERR_PTR(-ENOMEM);
1093 spin_lock_init(&cq->cq_lock);
1094 spin_lock_init(&cq->comp_handler_lock);
1095 INIT_LIST_HEAD(&cq->sq_head);
1096 INIT_LIST_HEAD(&cq->rq_head);
1097 cq->first_arm = true;
1100 uctx = get_ocrdma_ucontext(ib_ctx);
1101 pd_id = uctx->cntxt_pd->id;
1104 status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq, pd_id);
1107 return ERR_PTR(status);
1110 status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
1114 cq->phase = OCRDMA_CQE_VALID;
1115 dev->cq_tbl[cq->id] = cq;
1119 ocrdma_mbx_destroy_cq(dev, cq);
1121 return ERR_PTR(status);
1124 int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
1125 struct ib_udata *udata)
1128 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1130 if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
1134 ibcq->cqe = new_cnt;
1138 static void ocrdma_flush_cq(struct ocrdma_cq *cq)
1141 int valid_count = 0;
1142 unsigned long flags;
1144 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
1145 struct ocrdma_cqe *cqe = NULL;
1148 cqe_cnt = cq->cqe_cnt;
1150 /* Last irq might have scheduled a polling thread
1151 * sync-up with it before hard flushing.
1153 spin_lock_irqsave(&cq->cq_lock, flags);
1155 if (is_cqe_valid(cq, cqe))
1160 ocrdma_ring_cq_db(dev, cq->id, false, false, valid_count);
1161 spin_unlock_irqrestore(&cq->cq_lock, flags);
1164 int ocrdma_destroy_cq(struct ib_cq *ibcq)
1166 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
1167 struct ocrdma_eq *eq = NULL;
1168 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
1172 dev->cq_tbl[cq->id] = NULL;
1173 indx = ocrdma_get_eq_table_index(dev, cq->eqn);
1174 if (indx == -EINVAL)
1177 eq = &dev->eq_tbl[indx];
1178 irq = ocrdma_get_irq(dev, eq);
1179 synchronize_irq(irq);
1180 ocrdma_flush_cq(cq);
1182 (void)ocrdma_mbx_destroy_cq(dev, cq);
1184 pdid = cq->ucontext->cntxt_pd->id;
1185 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
1186 PAGE_ALIGN(cq->len));
1187 ocrdma_del_mmap(cq->ucontext,
1188 ocrdma_get_db_addr(dev, pdid),
1189 dev->nic_info.db_page_size);
1196 static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1198 int status = -EINVAL;
1200 if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
1201 dev->qp_tbl[qp->id] = qp;
1207 static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
1209 dev->qp_tbl[qp->id] = NULL;
1212 static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
1213 struct ib_qp_init_attr *attrs)
1215 if ((attrs->qp_type != IB_QPT_GSI) &&
1216 (attrs->qp_type != IB_QPT_RC) &&
1217 (attrs->qp_type != IB_QPT_UC) &&
1218 (attrs->qp_type != IB_QPT_UD)) {
1219 pr_err("%s(%d) unsupported qp type=0x%x requested\n",
1220 __func__, dev->id, attrs->qp_type);
1223 /* Skip the check for QP1 to support CM size of 128 */
1224 if ((attrs->qp_type != IB_QPT_GSI) &&
1225 (attrs->cap.max_send_wr > dev->attr.max_wqe)) {
1226 pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
1227 __func__, dev->id, attrs->cap.max_send_wr);
1228 pr_err("%s(%d) supported send_wr=0x%x\n",
1229 __func__, dev->id, dev->attr.max_wqe);
1232 if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
1233 pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
1234 __func__, dev->id, attrs->cap.max_recv_wr);
1235 pr_err("%s(%d) supported recv_wr=0x%x\n",
1236 __func__, dev->id, dev->attr.max_rqe);
1239 if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
1240 pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
1241 __func__, dev->id, attrs->cap.max_inline_data);
1242 pr_err("%s(%d) supported inline data size=0x%x\n",
1243 __func__, dev->id, dev->attr.max_inline_data);
1246 if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
1247 pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
1248 __func__, dev->id, attrs->cap.max_send_sge);
1249 pr_err("%s(%d) supported send_sge=0x%x\n",
1250 __func__, dev->id, dev->attr.max_send_sge);
1253 if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
1254 pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
1255 __func__, dev->id, attrs->cap.max_recv_sge);
1256 pr_err("%s(%d) supported recv_sge=0x%x\n",
1257 __func__, dev->id, dev->attr.max_recv_sge);
1260 /* unprivileged user space cannot create special QP */
1261 if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
1263 ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
1264 __func__, dev->id, attrs->qp_type);
1267 /* allow creating only one GSI type of QP */
1268 if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
1269 pr_err("%s(%d) GSI special QPs already created.\n",
1273 /* verify consumer QPs are not trying to use GSI QP's CQ */
1274 if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
1275 if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
1276 (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
1277 pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
1285 static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1286 struct ib_udata *udata, int dpp_offset,
1287 int dpp_credit_lmt, int srq)
1291 struct ocrdma_create_qp_uresp uresp;
1292 struct ocrdma_pd *pd = qp->pd;
1293 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
1295 memset(&uresp, 0, sizeof(uresp));
1296 usr_db = dev->nic_info.unmapped_db +
1297 (pd->id * dev->nic_info.db_page_size);
1298 uresp.qp_id = qp->id;
1299 uresp.sq_dbid = qp->sq.dbid;
1300 uresp.num_sq_pages = 1;
1301 uresp.sq_page_size = PAGE_ALIGN(qp->sq.len);
1302 uresp.sq_page_addr[0] = virt_to_phys(qp->sq.va);
1303 uresp.num_wqe_allocated = qp->sq.max_cnt;
1305 uresp.rq_dbid = qp->rq.dbid;
1306 uresp.num_rq_pages = 1;
1307 uresp.rq_page_size = PAGE_ALIGN(qp->rq.len);
1308 uresp.rq_page_addr[0] = virt_to_phys(qp->rq.va);
1309 uresp.num_rqe_allocated = qp->rq.max_cnt;
1311 uresp.db_page_addr = usr_db;
1312 uresp.db_page_size = dev->nic_info.db_page_size;
1313 uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
1314 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1315 uresp.db_shift = OCRDMA_DB_RQ_SHIFT;
1317 if (qp->dpp_enabled) {
1318 uresp.dpp_credit = dpp_credit_lmt;
1319 uresp.dpp_offset = dpp_offset;
1321 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1323 pr_err("%s(%d) user copy error.\n", __func__, dev->id);
1326 status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
1327 uresp.sq_page_size);
1332 status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
1333 uresp.rq_page_size);
1339 ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
1344 static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
1345 struct ocrdma_pd *pd)
1347 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
1348 qp->sq_db = dev->nic_info.db +
1349 (pd->id * dev->nic_info.db_page_size) +
1350 OCRDMA_DB_GEN2_SQ_OFFSET;
1351 qp->rq_db = dev->nic_info.db +
1352 (pd->id * dev->nic_info.db_page_size) +
1353 OCRDMA_DB_GEN2_RQ_OFFSET;
1355 qp->sq_db = dev->nic_info.db +
1356 (pd->id * dev->nic_info.db_page_size) +
1357 OCRDMA_DB_SQ_OFFSET;
1358 qp->rq_db = dev->nic_info.db +
1359 (pd->id * dev->nic_info.db_page_size) +
1360 OCRDMA_DB_RQ_OFFSET;
1364 static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
1367 kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
1369 if (qp->wqe_wr_id_tbl == NULL)
1372 kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
1373 if (qp->rqe_wr_id_tbl == NULL)
1379 static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
1380 struct ocrdma_pd *pd,
1381 struct ib_qp_init_attr *attrs)
1384 spin_lock_init(&qp->q_lock);
1385 INIT_LIST_HEAD(&qp->sq_entry);
1386 INIT_LIST_HEAD(&qp->rq_entry);
1388 qp->qp_type = attrs->qp_type;
1389 qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
1390 qp->max_inline_data = attrs->cap.max_inline_data;
1391 qp->sq.max_sges = attrs->cap.max_send_sge;
1392 qp->rq.max_sges = attrs->cap.max_recv_sge;
1393 qp->state = OCRDMA_QPS_RST;
1394 qp->signaled = (attrs->sq_sig_type == IB_SIGNAL_ALL_WR) ? true : false;
1397 static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
1398 struct ib_qp_init_attr *attrs)
1400 if (attrs->qp_type == IB_QPT_GSI) {
1401 dev->gsi_qp_created = 1;
1402 dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
1403 dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
1407 struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1408 struct ib_qp_init_attr *attrs,
1409 struct ib_udata *udata)
1412 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1413 struct ocrdma_qp *qp;
1414 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
1415 struct ocrdma_create_qp_ureq ureq;
1416 u16 dpp_credit_lmt, dpp_offset;
1418 status = ocrdma_check_qp_params(ibpd, dev, attrs);
1422 memset(&ureq, 0, sizeof(ureq));
1424 if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
1425 return ERR_PTR(-EFAULT);
1427 qp = kzalloc(sizeof(*qp), GFP_KERNEL);
1432 ocrdma_set_qp_init_params(qp, pd, attrs);
1434 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
1435 OCRDMA_QP_FAST_REG);
1437 mutex_lock(&dev->dev_lock);
1438 status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
1440 &dpp_offset, &dpp_credit_lmt);
1444 /* user space QP's wr_id table are managed in library */
1445 if (udata == NULL) {
1446 status = ocrdma_alloc_wr_id_tbl(qp);
1451 status = ocrdma_add_qpn_map(dev, qp);
1454 ocrdma_set_qp_db(dev, qp, pd);
1456 status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
1458 (attrs->srq != NULL));
1462 ocrdma_store_gsi_qp_cq(dev, attrs);
1463 qp->ibqp.qp_num = qp->id;
1464 mutex_unlock(&dev->dev_lock);
1468 ocrdma_del_qpn_map(dev, qp);
1470 ocrdma_mbx_destroy_qp(dev, qp);
1472 mutex_unlock(&dev->dev_lock);
1473 kfree(qp->wqe_wr_id_tbl);
1474 kfree(qp->rqe_wr_id_tbl);
1476 pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
1478 return ERR_PTR(status);
1481 int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1485 struct ocrdma_qp *qp;
1486 struct ocrdma_dev *dev;
1487 enum ib_qp_state old_qps;
1489 qp = get_ocrdma_qp(ibqp);
1490 dev = get_ocrdma_dev(ibqp->device);
1491 if (attr_mask & IB_QP_STATE)
1492 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
1493 /* if new and previous states are same hw doesn't need to
1498 status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask);
1503 int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1504 int attr_mask, struct ib_udata *udata)
1506 unsigned long flags;
1507 int status = -EINVAL;
1508 struct ocrdma_qp *qp;
1509 struct ocrdma_dev *dev;
1510 enum ib_qp_state old_qps, new_qps;
1512 qp = get_ocrdma_qp(ibqp);
1513 dev = get_ocrdma_dev(ibqp->device);
1515 /* syncronize with multiple context trying to change, retrive qps */
1516 mutex_lock(&dev->dev_lock);
1517 /* syncronize with wqe, rqe posting and cqe processing contexts */
1518 spin_lock_irqsave(&qp->q_lock, flags);
1519 old_qps = get_ibqp_state(qp->state);
1520 if (attr_mask & IB_QP_STATE)
1521 new_qps = attr->qp_state;
1524 spin_unlock_irqrestore(&qp->q_lock, flags);
1526 if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask,
1527 IB_LINK_LAYER_ETHERNET)) {
1528 pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
1529 "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
1530 __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
1535 status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
1539 mutex_unlock(&dev->dev_lock);
1543 static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
1561 static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
1563 int ib_qp_acc_flags = 0;
1565 if (qp_cap_flags & OCRDMA_QP_INB_WR)
1566 ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
1567 if (qp_cap_flags & OCRDMA_QP_INB_RD)
1568 ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
1569 return ib_qp_acc_flags;
1572 int ocrdma_query_qp(struct ib_qp *ibqp,
1573 struct ib_qp_attr *qp_attr,
1574 int attr_mask, struct ib_qp_init_attr *qp_init_attr)
1578 struct ocrdma_qp_params params;
1579 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1580 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
1582 memset(¶ms, 0, sizeof(params));
1583 mutex_lock(&dev->dev_lock);
1584 status = ocrdma_mbx_query_qp(dev, qp, ¶ms);
1585 mutex_unlock(&dev->dev_lock);
1588 if (qp->qp_type == IB_QPT_UD)
1589 qp_attr->qkey = params.qkey;
1591 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1592 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
1593 OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
1594 qp_attr->path_mig_state = IB_MIG_MIGRATED;
1595 qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
1596 qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
1597 qp_attr->dest_qp_num =
1598 params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
1600 qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
1601 qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
1602 qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
1603 qp_attr->cap.max_send_sge = qp->sq.max_sges;
1604 qp_attr->cap.max_recv_sge = qp->rq.max_sges;
1605 qp_attr->cap.max_inline_data = qp->max_inline_data;
1606 qp_init_attr->cap = qp_attr->cap;
1607 memcpy(&qp_attr->ah_attr.grh.dgid, ¶ms.dgid[0],
1608 sizeof(params.dgid));
1609 qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
1610 OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
1611 qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
1612 qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
1613 OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
1614 OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
1615 qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
1616 OCRDMA_QP_PARAMS_TCLASS_MASK) >>
1617 OCRDMA_QP_PARAMS_TCLASS_SHIFT;
1619 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1620 qp_attr->ah_attr.port_num = 1;
1621 qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
1622 OCRDMA_QP_PARAMS_SL_MASK) >>
1623 OCRDMA_QP_PARAMS_SL_SHIFT;
1624 qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
1625 OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
1626 OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
1627 qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
1628 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
1629 OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
1630 qp_attr->retry_cnt =
1631 (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
1632 OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
1633 qp_attr->min_rnr_timer = 0;
1634 qp_attr->pkey_index = 0;
1635 qp_attr->port_num = 1;
1636 qp_attr->ah_attr.src_path_bits = 0;
1637 qp_attr->ah_attr.static_rate = 0;
1638 qp_attr->alt_pkey_index = 0;
1639 qp_attr->alt_port_num = 0;
1640 qp_attr->alt_timeout = 0;
1641 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1642 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1643 OCRDMA_QP_PARAMS_STATE_SHIFT;
1644 qp_attr->qp_state = get_ibqp_state(qp_state);
1645 qp_attr->cur_qp_state = qp_attr->qp_state;
1646 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1647 qp_attr->max_dest_rd_atomic =
1648 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
1649 qp_attr->max_rd_atomic =
1650 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1651 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1652 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
1653 /* Sync driver QP state with FW */
1654 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL);
1659 static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx)
1661 unsigned int i = idx / 32;
1662 u32 mask = (1U << (idx % 32));
1664 srq->idx_bit_fields[i] ^= mask;
1667 static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
1669 return ((q->max_wqe_idx - q->head) + q->tail) % q->max_cnt;
1672 static int is_hw_sq_empty(struct ocrdma_qp *qp)
1674 return (qp->sq.tail == qp->sq.head);
1677 static int is_hw_rq_empty(struct ocrdma_qp *qp)
1679 return (qp->rq.tail == qp->rq.head);
1682 static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
1684 return q->va + (q->head * q->entry_size);
1687 static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
1690 return q->va + (idx * q->entry_size);
1693 static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
1695 q->head = (q->head + 1) & q->max_wqe_idx;
1698 static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
1700 q->tail = (q->tail + 1) & q->max_wqe_idx;
1703 /* discard the cqe for a given QP */
1704 static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
1706 unsigned long cq_flags;
1707 unsigned long flags;
1708 int discard_cnt = 0;
1709 u32 cur_getp, stop_getp;
1710 struct ocrdma_cqe *cqe;
1711 u32 qpn = 0, wqe_idx = 0;
1713 spin_lock_irqsave(&cq->cq_lock, cq_flags);
1715 /* traverse through the CQEs in the hw CQ,
1716 * find the matching CQE for a given qp,
1717 * mark the matching one discarded by clearing qpn.
1718 * ring the doorbell in the poll_cq() as
1719 * we don't complete out of order cqe.
1722 cur_getp = cq->getp;
1723 /* find upto when do we reap the cq. */
1724 stop_getp = cur_getp;
1726 if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
1729 cqe = cq->va + cur_getp;
1730 /* if (a) done reaping whole hw cq, or
1731 * (b) qp_xq becomes empty.
1734 qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
1735 /* if previously discarded cqe found, skip that too. */
1736 /* check for matching qp */
1737 if (qpn == 0 || qpn != qp->id)
1740 if (is_cqe_for_sq(cqe)) {
1741 ocrdma_hwq_inc_tail(&qp->sq);
1744 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
1745 OCRDMA_CQE_BUFTAG_SHIFT) &
1746 qp->srq->rq.max_wqe_idx;
1749 spin_lock_irqsave(&qp->srq->q_lock, flags);
1750 ocrdma_hwq_inc_tail(&qp->srq->rq);
1751 ocrdma_srq_toggle_bit(qp->srq, wqe_idx - 1);
1752 spin_unlock_irqrestore(&qp->srq->q_lock, flags);
1755 ocrdma_hwq_inc_tail(&qp->rq);
1758 /* mark cqe discarded so that it is not picked up later
1764 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
1765 } while (cur_getp != stop_getp);
1766 spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
1769 void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
1772 unsigned long flags;
1773 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
1774 /* sync with any active CQ poll */
1776 spin_lock_irqsave(&dev->flush_q_lock, flags);
1777 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1779 list_del(&qp->sq_entry);
1781 found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
1783 list_del(&qp->rq_entry);
1785 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1788 int ocrdma_destroy_qp(struct ib_qp *ibqp)
1790 struct ocrdma_pd *pd;
1791 struct ocrdma_qp *qp;
1792 struct ocrdma_dev *dev;
1793 struct ib_qp_attr attrs;
1795 unsigned long flags;
1797 qp = get_ocrdma_qp(ibqp);
1798 dev = get_ocrdma_dev(ibqp->device);
1802 /* change the QP state to ERROR */
1803 if (qp->state != OCRDMA_QPS_RST) {
1804 attrs.qp_state = IB_QPS_ERR;
1805 attr_mask = IB_QP_STATE;
1806 _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
1808 /* ensure that CQEs for newly created QP (whose id may be same with
1809 * one which just getting destroyed are same), dont get
1810 * discarded until the old CQEs are discarded.
1812 mutex_lock(&dev->dev_lock);
1813 (void) ocrdma_mbx_destroy_qp(dev, qp);
1816 * acquire CQ lock while destroy is in progress, in order to
1817 * protect against proessing in-flight CQEs for this QP.
1819 spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
1820 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
1821 spin_lock(&qp->rq_cq->cq_lock);
1823 ocrdma_del_qpn_map(dev, qp);
1825 if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
1826 spin_unlock(&qp->rq_cq->cq_lock);
1827 spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
1830 ocrdma_discard_cqes(qp, qp->sq_cq);
1831 ocrdma_discard_cqes(qp, qp->rq_cq);
1833 mutex_unlock(&dev->dev_lock);
1836 ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa,
1837 PAGE_ALIGN(qp->sq.len));
1839 ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa,
1840 PAGE_ALIGN(qp->rq.len));
1843 ocrdma_del_flush_qp(qp);
1845 kfree(qp->wqe_wr_id_tbl);
1846 kfree(qp->rqe_wr_id_tbl);
1851 static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
1852 struct ib_udata *udata)
1855 struct ocrdma_create_srq_uresp uresp;
1857 memset(&uresp, 0, sizeof(uresp));
1858 uresp.rq_dbid = srq->rq.dbid;
1859 uresp.num_rq_pages = 1;
1860 uresp.rq_page_addr[0] = virt_to_phys(srq->rq.va);
1861 uresp.rq_page_size = srq->rq.len;
1862 uresp.db_page_addr = dev->nic_info.unmapped_db +
1863 (srq->pd->id * dev->nic_info.db_page_size);
1864 uresp.db_page_size = dev->nic_info.db_page_size;
1865 uresp.num_rqe_allocated = srq->rq.max_cnt;
1866 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) {
1867 uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ_OFFSET;
1868 uresp.db_shift = 24;
1870 uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
1871 uresp.db_shift = 16;
1874 status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
1877 status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
1878 uresp.rq_page_size);
1884 struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
1885 struct ib_srq_init_attr *init_attr,
1886 struct ib_udata *udata)
1888 int status = -ENOMEM;
1889 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
1890 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
1891 struct ocrdma_srq *srq;
1893 if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
1894 return ERR_PTR(-EINVAL);
1895 if (init_attr->attr.max_wr > dev->attr.max_rqe)
1896 return ERR_PTR(-EINVAL);
1898 srq = kzalloc(sizeof(*srq), GFP_KERNEL);
1900 return ERR_PTR(status);
1902 spin_lock_init(&srq->q_lock);
1904 srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
1905 status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
1909 if (udata == NULL) {
1910 srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
1912 if (srq->rqe_wr_id_tbl == NULL)
1915 srq->bit_fields_len = (srq->rq.max_cnt / 32) +
1916 (srq->rq.max_cnt % 32 ? 1 : 0);
1917 srq->idx_bit_fields =
1918 kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
1919 if (srq->idx_bit_fields == NULL)
1921 memset(srq->idx_bit_fields, 0xff,
1922 srq->bit_fields_len * sizeof(u32));
1925 if (init_attr->attr.srq_limit) {
1926 status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
1932 status = ocrdma_copy_srq_uresp(dev, srq, udata);
1940 ocrdma_mbx_destroy_srq(dev, srq);
1942 kfree(srq->rqe_wr_id_tbl);
1943 kfree(srq->idx_bit_fields);
1945 return ERR_PTR(status);
1948 int ocrdma_modify_srq(struct ib_srq *ibsrq,
1949 struct ib_srq_attr *srq_attr,
1950 enum ib_srq_attr_mask srq_attr_mask,
1951 struct ib_udata *udata)
1954 struct ocrdma_srq *srq;
1956 srq = get_ocrdma_srq(ibsrq);
1957 if (srq_attr_mask & IB_SRQ_MAX_WR)
1960 status = ocrdma_mbx_modify_srq(srq, srq_attr);
1964 int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
1967 struct ocrdma_srq *srq;
1969 srq = get_ocrdma_srq(ibsrq);
1970 status = ocrdma_mbx_query_srq(srq, srq_attr);
1974 int ocrdma_destroy_srq(struct ib_srq *ibsrq)
1977 struct ocrdma_srq *srq;
1978 struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
1980 srq = get_ocrdma_srq(ibsrq);
1982 status = ocrdma_mbx_destroy_srq(dev, srq);
1985 ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa,
1986 PAGE_ALIGN(srq->rq.len));
1988 kfree(srq->idx_bit_fields);
1989 kfree(srq->rqe_wr_id_tbl);
1994 /* unprivileged verbs and their support functions. */
1995 static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1996 struct ocrdma_hdr_wqe *hdr,
1997 struct ib_send_wr *wr)
1999 struct ocrdma_ewqe_ud_hdr *ud_hdr =
2000 (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
2001 struct ocrdma_ah *ah = get_ocrdma_ah(ud_wr(wr)->ah);
2003 ud_hdr->rsvd_dest_qpn = ud_wr(wr)->remote_qpn;
2004 if (qp->qp_type == IB_QPT_GSI)
2005 ud_hdr->qkey = qp->qkey;
2007 ud_hdr->qkey = ud_wr(wr)->remote_qkey;
2008 ud_hdr->rsvd_ahid = ah->id;
2009 if (ah->av->valid & OCRDMA_AV_VLAN_VALID)
2010 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT);
2013 static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
2014 struct ocrdma_sge *sge, int num_sge,
2015 struct ib_sge *sg_list)
2019 for (i = 0; i < num_sge; i++) {
2020 sge[i].lrkey = sg_list[i].lkey;
2021 sge[i].addr_lo = sg_list[i].addr;
2022 sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
2023 sge[i].len = sg_list[i].length;
2024 hdr->total_len += sg_list[i].length;
2027 memset(sge, 0, sizeof(*sge));
2030 static inline uint32_t ocrdma_sglist_len(struct ib_sge *sg_list, int num_sge)
2032 uint32_t total_len = 0, i;
2034 for (i = 0; i < num_sge; i++)
2035 total_len += sg_list[i].length;
2040 static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
2041 struct ocrdma_hdr_wqe *hdr,
2042 struct ocrdma_sge *sge,
2043 struct ib_send_wr *wr, u32 wqe_size)
2048 if (wr->send_flags & IB_SEND_INLINE && qp->qp_type != IB_QPT_UD) {
2049 hdr->total_len = ocrdma_sglist_len(wr->sg_list, wr->num_sge);
2050 if (unlikely(hdr->total_len > qp->max_inline_data)) {
2051 pr_err("%s() supported_len=0x%x,\n"
2052 " unsupported len req=0x%x\n", __func__,
2053 qp->max_inline_data, hdr->total_len);
2056 dpp_addr = (char *)sge;
2057 for (i = 0; i < wr->num_sge; i++) {
2059 (void *)(unsigned long)wr->sg_list[i].addr,
2060 wr->sg_list[i].length);
2061 dpp_addr += wr->sg_list[i].length;
2064 wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
2065 if (0 == hdr->total_len)
2066 wqe_size += sizeof(struct ocrdma_sge);
2067 hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
2069 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2071 wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
2073 wqe_size += sizeof(struct ocrdma_sge);
2074 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2076 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2080 static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2081 struct ib_send_wr *wr)
2084 struct ocrdma_sge *sge;
2085 u32 wqe_size = sizeof(*hdr);
2087 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2088 ocrdma_build_ud_hdr(qp, hdr, wr);
2089 sge = (struct ocrdma_sge *)(hdr + 2);
2090 wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
2092 sge = (struct ocrdma_sge *)(hdr + 1);
2095 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2099 static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2100 struct ib_send_wr *wr)
2103 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2104 struct ocrdma_sge *sge = ext_rw + 1;
2105 u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
2107 status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
2110 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
2111 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
2112 ext_rw->lrkey = rdma_wr(wr)->rkey;
2113 ext_rw->len = hdr->total_len;
2117 static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2118 struct ib_send_wr *wr)
2120 struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
2121 struct ocrdma_sge *sge = ext_rw + 1;
2122 u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
2123 sizeof(struct ocrdma_hdr_wqe);
2125 ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
2126 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2127 hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
2128 hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2130 ext_rw->addr_lo = rdma_wr(wr)->remote_addr;
2131 ext_rw->addr_hi = upper_32_bits(rdma_wr(wr)->remote_addr);
2132 ext_rw->lrkey = rdma_wr(wr)->rkey;
2133 ext_rw->len = hdr->total_len;
2136 static int get_encoded_page_size(int pg_sz)
2138 /* Max size is 256M 4096 << 16 */
2141 if (pg_sz == (4096 << i))
2146 static int ocrdma_build_reg(struct ocrdma_qp *qp,
2147 struct ocrdma_hdr_wqe *hdr,
2148 struct ib_reg_wr *wr)
2151 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2152 struct ocrdma_mr *mr = get_ocrdma_mr(wr->mr);
2153 struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
2154 struct ocrdma_pbe *pbe;
2155 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2156 int num_pbes = 0, i;
2158 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2160 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
2161 hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
2163 if (wr->access & IB_ACCESS_LOCAL_WRITE)
2164 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_LOCAL_WR;
2165 if (wr->access & IB_ACCESS_REMOTE_WRITE)
2166 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_WR;
2167 if (wr->access & IB_ACCESS_REMOTE_READ)
2168 hdr->rsvd_lkey_flags |= OCRDMA_LKEY_FLAG_REMOTE_RD;
2169 hdr->lkey = wr->key;
2170 hdr->total_len = mr->ibmr.length;
2172 fbo = mr->ibmr.iova - mr->pages[0];
2174 fast_reg->va_hi = upper_32_bits(mr->ibmr.iova);
2175 fast_reg->va_lo = (u32) (mr->ibmr.iova & 0xffffffff);
2176 fast_reg->fbo_hi = upper_32_bits(fbo);
2177 fast_reg->fbo_lo = (u32) fbo & 0xffffffff;
2178 fast_reg->num_sges = mr->npages;
2179 fast_reg->size_sge = get_encoded_page_size(mr->ibmr.page_size);
2182 for (i = 0; i < mr->npages; i++) {
2183 u64 buf_addr = mr->pages[i];
2185 pbe->pa_lo = cpu_to_le32((u32) (buf_addr & PAGE_MASK));
2186 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr));
2190 /* if the pbl is full storing the pbes,
2193 if (num_pbes == (mr->hwmr.pbl_size/sizeof(u64))) {
2195 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
2202 static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
2204 u32 val = qp->sq.dbid | (1 << OCRDMA_DB_SQ_SHIFT);
2206 iowrite32(val, qp->sq_db);
2209 int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2210 struct ib_send_wr **bad_wr)
2213 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2214 struct ocrdma_hdr_wqe *hdr;
2215 unsigned long flags;
2217 spin_lock_irqsave(&qp->q_lock, flags);
2218 if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
2219 spin_unlock_irqrestore(&qp->q_lock, flags);
2225 if (qp->qp_type == IB_QPT_UD &&
2226 (wr->opcode != IB_WR_SEND &&
2227 wr->opcode != IB_WR_SEND_WITH_IMM)) {
2232 if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
2233 wr->num_sge > qp->sq.max_sges) {
2238 hdr = ocrdma_hwq_head(&qp->sq);
2240 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
2241 hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2242 if (wr->send_flags & IB_SEND_FENCE)
2244 (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
2245 if (wr->send_flags & IB_SEND_SOLICITED)
2247 (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
2249 switch (wr->opcode) {
2250 case IB_WR_SEND_WITH_IMM:
2251 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2252 hdr->immdt = ntohl(wr->ex.imm_data);
2254 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2255 ocrdma_build_send(qp, hdr, wr);
2257 case IB_WR_SEND_WITH_INV:
2258 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2259 hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2260 hdr->lkey = wr->ex.invalidate_rkey;
2261 status = ocrdma_build_send(qp, hdr, wr);
2263 case IB_WR_RDMA_WRITE_WITH_IMM:
2264 hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2265 hdr->immdt = ntohl(wr->ex.imm_data);
2266 case IB_WR_RDMA_WRITE:
2267 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2268 status = ocrdma_build_write(qp, hdr, wr);
2270 case IB_WR_RDMA_READ:
2271 ocrdma_build_read(qp, hdr, wr);
2273 case IB_WR_LOCAL_INV:
2275 (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
2276 hdr->cw |= ((sizeof(struct ocrdma_hdr_wqe) +
2277 sizeof(struct ocrdma_sge)) /
2278 OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
2279 hdr->lkey = wr->ex.invalidate_rkey;
2282 status = ocrdma_build_reg(qp, hdr, reg_wr(wr));
2292 if (wr->send_flags & IB_SEND_SIGNALED || qp->signaled)
2293 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
2295 qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
2296 qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
2297 ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
2298 OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
2299 /* make sure wqe is written before adapter can access it */
2301 /* inform hw to start processing it */
2302 ocrdma_ring_sq_db(qp);
2304 /* update pointer, counter for next wr */
2305 ocrdma_hwq_inc_head(&qp->sq);
2308 spin_unlock_irqrestore(&qp->q_lock, flags);
2312 static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
2314 u32 val = qp->rq.dbid | (1 << OCRDMA_DB_RQ_SHIFT);
2316 iowrite32(val, qp->rq_db);
2319 static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
2323 struct ocrdma_sge *sge;
2325 wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
2327 wqe_size = sizeof(*sge) + sizeof(*rqe);
2329 rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
2330 OCRDMA_WQE_SIZE_SHIFT);
2331 rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
2332 rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
2334 rqe->rsvd_tag = tag;
2335 sge = (struct ocrdma_sge *)(rqe + 1);
2336 ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
2337 ocrdma_cpu_to_le32(rqe, wqe_size);
2340 int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
2341 struct ib_recv_wr **bad_wr)
2344 unsigned long flags;
2345 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
2346 struct ocrdma_hdr_wqe *rqe;
2348 spin_lock_irqsave(&qp->q_lock, flags);
2349 if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
2350 spin_unlock_irqrestore(&qp->q_lock, flags);
2355 if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
2356 wr->num_sge > qp->rq.max_sges) {
2361 rqe = ocrdma_hwq_head(&qp->rq);
2362 ocrdma_build_rqe(rqe, wr, 0);
2364 qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
2365 /* make sure rqe is written before adapter can access it */
2368 /* inform hw to start processing it */
2369 ocrdma_ring_rq_db(qp);
2371 /* update pointer, counter for next wr */
2372 ocrdma_hwq_inc_head(&qp->rq);
2375 spin_unlock_irqrestore(&qp->q_lock, flags);
2379 /* cqe for srq's rqe can potentially arrive out of order.
2380 * index gives the entry in the shadow table where to store
2381 * the wr_id. tag/index is returned in cqe to reference back
2384 static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
2389 for (row = 0; row < srq->bit_fields_len; row++) {
2390 if (srq->idx_bit_fields[row]) {
2391 indx = ffs(srq->idx_bit_fields[row]);
2392 indx = (row * 32) + (indx - 1);
2393 if (indx >= srq->rq.max_cnt)
2395 ocrdma_srq_toggle_bit(srq, indx);
2400 if (row == srq->bit_fields_len)
2402 return indx + 1; /* Use from index 1 */
2405 static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
2407 u32 val = srq->rq.dbid | (1 << 16);
2409 iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
2412 int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
2413 struct ib_recv_wr **bad_wr)
2416 unsigned long flags;
2417 struct ocrdma_srq *srq;
2418 struct ocrdma_hdr_wqe *rqe;
2421 srq = get_ocrdma_srq(ibsrq);
2423 spin_lock_irqsave(&srq->q_lock, flags);
2425 if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
2426 wr->num_sge > srq->rq.max_sges) {
2431 tag = ocrdma_srq_get_idx(srq);
2432 rqe = ocrdma_hwq_head(&srq->rq);
2433 ocrdma_build_rqe(rqe, wr, tag);
2435 srq->rqe_wr_id_tbl[tag] = wr->wr_id;
2436 /* make sure rqe is written before adapter can perform DMA */
2438 /* inform hw to start processing it */
2439 ocrdma_ring_srq_db(srq);
2440 /* update pointer, counter for next wr */
2441 ocrdma_hwq_inc_head(&srq->rq);
2444 spin_unlock_irqrestore(&srq->q_lock, flags);
2448 static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
2450 enum ib_wc_status ibwc_status;
2453 case OCRDMA_CQE_GENERAL_ERR:
2454 ibwc_status = IB_WC_GENERAL_ERR;
2456 case OCRDMA_CQE_LOC_LEN_ERR:
2457 ibwc_status = IB_WC_LOC_LEN_ERR;
2459 case OCRDMA_CQE_LOC_QP_OP_ERR:
2460 ibwc_status = IB_WC_LOC_QP_OP_ERR;
2462 case OCRDMA_CQE_LOC_EEC_OP_ERR:
2463 ibwc_status = IB_WC_LOC_EEC_OP_ERR;
2465 case OCRDMA_CQE_LOC_PROT_ERR:
2466 ibwc_status = IB_WC_LOC_PROT_ERR;
2468 case OCRDMA_CQE_WR_FLUSH_ERR:
2469 ibwc_status = IB_WC_WR_FLUSH_ERR;
2471 case OCRDMA_CQE_MW_BIND_ERR:
2472 ibwc_status = IB_WC_MW_BIND_ERR;
2474 case OCRDMA_CQE_BAD_RESP_ERR:
2475 ibwc_status = IB_WC_BAD_RESP_ERR;
2477 case OCRDMA_CQE_LOC_ACCESS_ERR:
2478 ibwc_status = IB_WC_LOC_ACCESS_ERR;
2480 case OCRDMA_CQE_REM_INV_REQ_ERR:
2481 ibwc_status = IB_WC_REM_INV_REQ_ERR;
2483 case OCRDMA_CQE_REM_ACCESS_ERR:
2484 ibwc_status = IB_WC_REM_ACCESS_ERR;
2486 case OCRDMA_CQE_REM_OP_ERR:
2487 ibwc_status = IB_WC_REM_OP_ERR;
2489 case OCRDMA_CQE_RETRY_EXC_ERR:
2490 ibwc_status = IB_WC_RETRY_EXC_ERR;
2492 case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
2493 ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
2495 case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
2496 ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
2498 case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
2499 ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
2501 case OCRDMA_CQE_REM_ABORT_ERR:
2502 ibwc_status = IB_WC_REM_ABORT_ERR;
2504 case OCRDMA_CQE_INV_EECN_ERR:
2505 ibwc_status = IB_WC_INV_EECN_ERR;
2507 case OCRDMA_CQE_INV_EEC_STATE_ERR:
2508 ibwc_status = IB_WC_INV_EEC_STATE_ERR;
2510 case OCRDMA_CQE_FATAL_ERR:
2511 ibwc_status = IB_WC_FATAL_ERR;
2513 case OCRDMA_CQE_RESP_TIMEOUT_ERR:
2514 ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
2517 ibwc_status = IB_WC_GENERAL_ERR;
2523 static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
2526 struct ocrdma_hdr_wqe *hdr;
2527 struct ocrdma_sge *rw;
2530 hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
2532 ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
2533 /* Undo the hdr->cw swap */
2534 opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
2537 ibwc->opcode = IB_WC_RDMA_WRITE;
2540 rw = (struct ocrdma_sge *)(hdr + 1);
2541 ibwc->opcode = IB_WC_RDMA_READ;
2542 ibwc->byte_len = rw->len;
2545 ibwc->opcode = IB_WC_SEND;
2548 ibwc->opcode = IB_WC_REG_MR;
2550 case OCRDMA_LKEY_INV:
2551 ibwc->opcode = IB_WC_LOCAL_INV;
2554 ibwc->status = IB_WC_GENERAL_ERR;
2555 pr_err("%s() invalid opcode received = 0x%x\n",
2556 __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
2561 static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
2562 struct ocrdma_cqe *cqe)
2564 if (is_cqe_for_sq(cqe)) {
2565 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2566 cqe->flags_status_srcqpn) &
2567 ~OCRDMA_CQE_STATUS_MASK);
2568 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2569 cqe->flags_status_srcqpn) |
2570 (OCRDMA_CQE_WR_FLUSH_ERR <<
2571 OCRDMA_CQE_STATUS_SHIFT));
2573 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2574 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2575 cqe->flags_status_srcqpn) &
2576 ~OCRDMA_CQE_UD_STATUS_MASK);
2577 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2578 cqe->flags_status_srcqpn) |
2579 (OCRDMA_CQE_WR_FLUSH_ERR <<
2580 OCRDMA_CQE_UD_STATUS_SHIFT));
2582 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2583 cqe->flags_status_srcqpn) &
2584 ~OCRDMA_CQE_STATUS_MASK);
2585 cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
2586 cqe->flags_status_srcqpn) |
2587 (OCRDMA_CQE_WR_FLUSH_ERR <<
2588 OCRDMA_CQE_STATUS_SHIFT));
2593 static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2594 struct ocrdma_qp *qp, int status)
2596 bool expand = false;
2599 ibwc->qp = &qp->ibqp;
2600 ibwc->status = ocrdma_to_ibwc_err(status);
2602 ocrdma_flush_qp(qp);
2603 ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
2605 /* if wqe/rqe pending for which cqe needs to be returned,
2606 * trigger inflating it.
2608 if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
2610 ocrdma_set_cqe_status_flushed(qp, cqe);
2615 static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2616 struct ocrdma_qp *qp, int status)
2618 ibwc->opcode = IB_WC_RECV;
2619 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2620 ocrdma_hwq_inc_tail(&qp->rq);
2622 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2625 static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
2626 struct ocrdma_qp *qp, int status)
2628 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2629 ocrdma_hwq_inc_tail(&qp->sq);
2631 return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
2635 static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2636 struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
2637 bool *polled, bool *stop)
2640 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2641 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2642 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2643 if (status < OCRDMA_MAX_CQE_ERR)
2644 atomic_inc(&dev->cqe_err_stats[status]);
2646 /* when hw sq is empty, but rq is not empty, so we continue
2647 * to keep the cqe in order to get the cq event again.
2649 if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
2650 /* when cq for rq and sq is same, it is safe to return
2651 * flush cqe for RQEs.
2653 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2655 status = OCRDMA_CQE_WR_FLUSH_ERR;
2656 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2658 /* stop processing further cqe as this cqe is used for
2659 * triggering cq event on buddy cq of RQ.
2660 * When QP is destroyed, this cqe will be removed
2661 * from the cq's hardware q.
2667 } else if (is_hw_sq_empty(qp)) {
2674 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2679 static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
2680 struct ocrdma_cqe *cqe,
2681 struct ib_wc *ibwc, bool *polled)
2683 bool expand = false;
2684 int tail = qp->sq.tail;
2687 if (!qp->wqe_wr_id_tbl[tail].signaled) {
2688 *polled = false; /* WC cannot be consumed yet */
2690 ibwc->status = IB_WC_SUCCESS;
2692 ibwc->qp = &qp->ibqp;
2693 ocrdma_update_wc(qp, ibwc, tail);
2696 wqe_idx = (le32_to_cpu(cqe->wq.wqeidx) &
2697 OCRDMA_CQE_WQEIDX_MASK) & qp->sq.max_wqe_idx;
2698 if (tail != wqe_idx)
2699 expand = true; /* Coalesced CQE can't be consumed yet */
2701 ocrdma_hwq_inc_tail(&qp->sq);
2705 static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2706 struct ib_wc *ibwc, bool *polled, bool *stop)
2711 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2712 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2714 if (status == OCRDMA_CQE_SUCCESS)
2715 expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
2717 expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
2721 static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
2725 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2726 OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
2727 ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
2728 OCRDMA_CQE_SRCQP_MASK;
2729 ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
2730 OCRDMA_CQE_PKEY_MASK;
2731 ibwc->wc_flags = IB_WC_GRH;
2732 ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
2733 OCRDMA_CQE_UD_XFER_LEN_SHIFT);
2737 static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
2738 struct ocrdma_cqe *cqe,
2739 struct ocrdma_qp *qp)
2741 unsigned long flags;
2742 struct ocrdma_srq *srq;
2745 srq = get_ocrdma_srq(qp->ibqp.srq);
2746 wqe_idx = (le32_to_cpu(cqe->rq.buftag_qpn) >>
2747 OCRDMA_CQE_BUFTAG_SHIFT) & srq->rq.max_wqe_idx;
2751 ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
2752 spin_lock_irqsave(&srq->q_lock, flags);
2753 ocrdma_srq_toggle_bit(srq, wqe_idx - 1);
2754 spin_unlock_irqrestore(&srq->q_lock, flags);
2755 ocrdma_hwq_inc_tail(&srq->rq);
2758 static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2759 struct ib_wc *ibwc, bool *polled, bool *stop,
2763 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2765 if (status < OCRDMA_MAX_CQE_ERR)
2766 atomic_inc(&dev->cqe_err_stats[status]);
2768 /* when hw_rq is empty, but wq is not empty, so continue
2769 * to keep the cqe to get the cq event again.
2771 if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
2772 if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
2774 status = OCRDMA_CQE_WR_FLUSH_ERR;
2775 expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
2781 } else if (is_hw_rq_empty(qp)) {
2788 expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
2793 static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
2794 struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
2796 ibwc->opcode = IB_WC_RECV;
2797 ibwc->qp = &qp->ibqp;
2798 ibwc->status = IB_WC_SUCCESS;
2800 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
2801 ocrdma_update_ud_rcqe(ibwc, cqe);
2803 ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
2805 if (is_cqe_imm(cqe)) {
2806 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2807 ibwc->wc_flags |= IB_WC_WITH_IMM;
2808 } else if (is_cqe_wr_imm(cqe)) {
2809 ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
2810 ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
2811 ibwc->wc_flags |= IB_WC_WITH_IMM;
2812 } else if (is_cqe_invalidated(cqe)) {
2813 ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
2814 ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
2817 ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
2819 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2820 ocrdma_hwq_inc_tail(&qp->rq);
2824 static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2825 struct ib_wc *ibwc, bool *polled, bool *stop)
2828 bool expand = false;
2831 if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
2832 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2833 OCRDMA_CQE_UD_STATUS_MASK) >>
2834 OCRDMA_CQE_UD_STATUS_SHIFT;
2836 status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2837 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2840 if (status == OCRDMA_CQE_SUCCESS) {
2842 ocrdma_poll_success_rcqe(qp, cqe, ibwc);
2844 expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
2850 static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
2853 if (cq->phase_change) {
2855 cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
2857 /* clear valid bit */
2858 cqe->flags_status_srcqpn = 0;
2862 static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
2867 bool expand = false;
2868 int polled_hw_cqes = 0;
2869 struct ocrdma_qp *qp = NULL;
2870 struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
2871 struct ocrdma_cqe *cqe;
2872 u16 cur_getp; bool polled = false; bool stop = false;
2874 cur_getp = cq->getp;
2875 while (num_entries) {
2876 cqe = cq->va + cur_getp;
2877 /* check whether valid cqe or not */
2878 if (!is_cqe_valid(cq, cqe))
2880 qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
2881 /* ignore discarded cqe */
2884 qp = dev->qp_tbl[qpn];
2887 if (is_cqe_for_sq(cqe)) {
2888 expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
2891 expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
2898 /* clear qpn to avoid duplicate processing by discard_cqe() */
2901 polled_hw_cqes += 1;
2902 cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
2903 ocrdma_change_cq_phase(cq, cqe, cur_getp);
2913 cq->getp = cur_getp;
2914 if (cq->deferred_arm || polled_hw_cqes) {
2915 ocrdma_ring_cq_db(dev, cq->id, cq->deferred_arm,
2916 cq->deferred_sol, polled_hw_cqes);
2917 cq->deferred_arm = false;
2918 cq->deferred_sol = false;
2924 /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
2925 static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
2926 struct ocrdma_qp *qp, struct ib_wc *ibwc)
2930 while (num_entries) {
2931 if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
2933 if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
2934 ocrdma_update_wc(qp, ibwc, qp->sq.tail);
2935 ocrdma_hwq_inc_tail(&qp->sq);
2936 } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
2937 ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
2938 ocrdma_hwq_inc_tail(&qp->rq);
2943 ibwc->status = IB_WC_WR_FLUSH_ERR;
2951 int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
2953 int cqes_to_poll = num_entries;
2954 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2955 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
2956 int num_os_cqe = 0, err_cqes = 0;
2957 struct ocrdma_qp *qp;
2958 unsigned long flags;
2960 /* poll cqes from adapter CQ */
2961 spin_lock_irqsave(&cq->cq_lock, flags);
2962 num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
2963 spin_unlock_irqrestore(&cq->cq_lock, flags);
2964 cqes_to_poll -= num_os_cqe;
2967 wc = wc + num_os_cqe;
2968 /* adapter returns single error cqe when qp moves to
2969 * error state. So insert error cqes with wc_status as
2970 * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
2971 * respectively which uses this CQ.
2973 spin_lock_irqsave(&dev->flush_q_lock, flags);
2974 list_for_each_entry(qp, &cq->sq_head, sq_entry) {
2975 if (cqes_to_poll == 0)
2977 err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
2978 cqes_to_poll -= err_cqes;
2979 num_os_cqe += err_cqes;
2982 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
2987 int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
2989 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
2990 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
2992 unsigned long flags;
2993 bool arm_needed = false, sol_needed = false;
2997 spin_lock_irqsave(&cq->cq_lock, flags);
2998 if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
3000 if (cq_flags & IB_CQ_SOLICITED)
3003 if (cq->first_arm) {
3004 ocrdma_ring_cq_db(dev, cq_id, arm_needed, sol_needed, 0);
3005 cq->first_arm = false;
3008 cq->deferred_arm = true;
3009 cq->deferred_sol = sol_needed;
3010 spin_unlock_irqrestore(&cq->cq_lock, flags);
3015 struct ib_mr *ocrdma_alloc_mr(struct ib_pd *ibpd,
3016 enum ib_mr_type mr_type,
3020 struct ocrdma_mr *mr;
3021 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3022 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3024 if (mr_type != IB_MR_TYPE_MEM_REG)
3025 return ERR_PTR(-EINVAL);
3027 if (max_num_sg > dev->attr.max_pages_per_frmr)
3028 return ERR_PTR(-EINVAL);
3030 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3032 return ERR_PTR(-ENOMEM);
3034 mr->pages = kcalloc(max_num_sg, sizeof(u64), GFP_KERNEL);
3040 status = ocrdma_get_pbl_info(dev, mr, max_num_sg);
3044 mr->hwmr.remote_rd = 0;
3045 mr->hwmr.remote_wr = 0;
3046 mr->hwmr.local_rd = 0;
3047 mr->hwmr.local_wr = 0;
3048 mr->hwmr.mw_bind = 0;
3049 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3052 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, 0);
3055 mr->ibmr.rkey = mr->hwmr.lkey;
3056 mr->ibmr.lkey = mr->hwmr.lkey;
3057 dev->stag_arr[(mr->hwmr.lkey >> 8) & (OCRDMA_MAX_STAG - 1)] =
3061 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3066 return ERR_PTR(-ENOMEM);
3069 #define MAX_KERNEL_PBE_SIZE 65536
3070 static inline int count_kernel_pbes(struct ib_phys_buf *buf_list,
3071 int buf_cnt, u32 *pbe_size)
3076 *pbe_size = roundup(buf_list[0].size, PAGE_SIZE);
3077 *pbe_size = roundup_pow_of_two(*pbe_size);
3079 /* find the smallest PBE size that we can have */
3080 for (i = 0; i < buf_cnt; i++) {
3081 /* first addr may not be page aligned, so ignore checking */
3082 if ((i != 0) && ((buf_list[i].addr & ~PAGE_MASK) ||
3083 (buf_list[i].size & ~PAGE_MASK))) {
3087 /* if configured PBE size is greater then the chosen one,
3088 * reduce the PBE size.
3090 buf_size = roundup(buf_list[i].size, PAGE_SIZE);
3091 /* pbe_size has to be even multiple of 4K 1,2,4,8...*/
3092 buf_size = roundup_pow_of_two(buf_size);
3093 if (*pbe_size > buf_size)
3094 *pbe_size = buf_size;
3096 total_size += buf_size;
3098 *pbe_size = *pbe_size > MAX_KERNEL_PBE_SIZE ?
3099 (MAX_KERNEL_PBE_SIZE) : (*pbe_size);
3101 /* num_pbes = total_size / (*pbe_size); this is implemented below. */
3103 return total_size >> ilog2(*pbe_size);
3106 static void build_kernel_pbes(struct ib_phys_buf *buf_list, int ib_buf_cnt,
3107 u32 pbe_size, struct ocrdma_pbl *pbl_tbl,
3108 struct ocrdma_hw_mr *hwmr)
3112 int pbes_per_buf = 0;
3115 struct ocrdma_pbe *pbe;
3116 int total_num_pbes = 0;
3118 if (!hwmr->num_pbes)
3121 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
3124 /* go through the OS phy regions & fill hw pbe entries into pbls. */
3125 for (i = 0; i < ib_buf_cnt; i++) {
3126 buf_addr = buf_list[i].addr;
3128 roundup_pow_of_two(roundup(buf_list[i].size, PAGE_SIZE)) /
3130 hwmr->len += buf_list[i].size;
3131 /* number of pbes can be more for one OS buf, when
3132 * buffers are of different sizes.
3133 * split the ib_buf to one or more pbes.
3135 for (idx = 0; idx < pbes_per_buf; idx++) {
3136 /* we program always page aligned addresses,
3137 * first unaligned address is taken care by fbo.
3140 /* for non zero fbo, assign the
3141 * start of the page.
3144 cpu_to_le32((u32) (buf_addr & PAGE_MASK));
3146 cpu_to_le32((u32) upper_32_bits(buf_addr));
3149 cpu_to_le32((u32) (buf_addr & 0xffffffff));
3151 cpu_to_le32((u32) upper_32_bits(buf_addr));
3153 buf_addr += pbe_size;
3155 total_num_pbes += 1;
3158 if (total_num_pbes == hwmr->num_pbes)
3160 /* if the pbl is full storing the pbes,
3163 if (num_pbes == (hwmr->pbl_size/sizeof(u64))) {
3165 pbe = (struct ocrdma_pbe *)pbl_tbl->va;
3174 struct ib_mr *ocrdma_reg_kernel_mr(struct ib_pd *ibpd,
3175 struct ib_phys_buf *buf_list,
3176 int buf_cnt, int acc, u64 *iova_start)
3178 int status = -ENOMEM;
3179 struct ocrdma_mr *mr;
3180 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
3181 struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
3185 if ((acc & IB_ACCESS_REMOTE_WRITE) && !(acc & IB_ACCESS_LOCAL_WRITE))
3186 return ERR_PTR(-EINVAL);
3188 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
3190 return ERR_PTR(status);
3192 num_pbes = count_kernel_pbes(buf_list, buf_cnt, &pbe_size);
3193 if (num_pbes == 0) {
3197 status = ocrdma_get_pbl_info(dev, mr, num_pbes);
3201 mr->hwmr.pbe_size = pbe_size;
3202 mr->hwmr.fbo = *iova_start - (buf_list[0].addr & PAGE_MASK);
3203 mr->hwmr.va = *iova_start;
3204 mr->hwmr.local_rd = 1;
3205 mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
3206 mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
3207 mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
3208 mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3209 mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
3211 status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
3214 build_kernel_pbes(buf_list, buf_cnt, pbe_size, mr->hwmr.pbl_table,
3216 status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
3220 mr->ibmr.lkey = mr->hwmr.lkey;
3221 if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
3222 mr->ibmr.rkey = mr->hwmr.lkey;
3226 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
3229 return ERR_PTR(status);
3232 static int ocrdma_set_page(struct ib_mr *ibmr, u64 addr)
3234 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
3236 if (unlikely(mr->npages == mr->hwmr.num_pbes))
3239 mr->pages[mr->npages++] = addr;
3244 int ocrdma_map_mr_sg(struct ib_mr *ibmr,
3245 struct scatterlist *sg,
3248 struct ocrdma_mr *mr = get_ocrdma_mr(ibmr);
3252 return ib_sg_to_pages(ibmr, sg, sg_nents, ocrdma_set_page);