2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
6 Copyright(c) 2014 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
20 Copyright(c) 2014 Intel Corporation.
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27 * Redistributions in binary form must reproduce the above copyright
28 notice, this list of conditions and the following disclaimer in
29 the documentation and/or other materials provided with the
31 * Neither the name of Intel Corporation nor the names of its
32 contributors may be used to endorse or promote products derived
33 from this software without specific prior written permission.
35 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 #ifndef ADF_TRANSPORT_ACCESS_MACROS_H
48 #define ADF_TRANSPORT_ACCESS_MACROS_H
50 #include "adf_accel_devices.h"
51 #define ADF_BANK_INT_SRC_SEL_MASK_0 0x4444444CUL
52 #define ADF_BANK_INT_SRC_SEL_MASK_X 0x44444444UL
53 #define ADF_RING_CSR_RING_CONFIG 0x000
54 #define ADF_RING_CSR_RING_LBASE 0x040
55 #define ADF_RING_CSR_RING_UBASE 0x080
56 #define ADF_RING_CSR_RING_HEAD 0x0C0
57 #define ADF_RING_CSR_RING_TAIL 0x100
58 #define ADF_RING_CSR_E_STAT 0x14C
59 #define ADF_RING_CSR_INT_SRCSEL 0x174
60 #define ADF_RING_CSR_INT_SRCSEL_2 0x178
61 #define ADF_RING_CSR_INT_COL_EN 0x17C
62 #define ADF_RING_CSR_INT_COL_CTL 0x180
63 #define ADF_RING_CSR_INT_FLAG_AND_COL 0x184
64 #define ADF_RING_CSR_INT_COL_CTL_ENABLE 0x80000000
65 #define ADF_RING_BUNDLE_SIZE 0x1000
66 #define ADF_RING_CONFIG_NEAR_FULL_WM 0x0A
67 #define ADF_RING_CONFIG_NEAR_EMPTY_WM 0x05
68 #define ADF_COALESCING_MIN_TIME 0x1FF
69 #define ADF_COALESCING_MAX_TIME 0xFFFFF
70 #define ADF_COALESCING_DEF_TIME 0x27FF
71 #define ADF_RING_NEAR_WATERMARK_512 0x08
72 #define ADF_RING_NEAR_WATERMARK_0 0x00
73 #define ADF_RING_EMPTY_SIG 0x7F7F7F7F
75 /* Valid internal ring size values */
76 #define ADF_RING_SIZE_128 0x01
77 #define ADF_RING_SIZE_256 0x02
78 #define ADF_RING_SIZE_512 0x03
79 #define ADF_RING_SIZE_4K 0x06
80 #define ADF_RING_SIZE_16K 0x08
81 #define ADF_RING_SIZE_4M 0x10
82 #define ADF_MIN_RING_SIZE ADF_RING_SIZE_128
83 #define ADF_MAX_RING_SIZE ADF_RING_SIZE_4M
84 #define ADF_DEFAULT_RING_SIZE ADF_RING_SIZE_16K
86 /* Valid internal msg size values */
87 #define ADF_MSG_SIZE_32 0x01
88 #define ADF_MSG_SIZE_64 0x02
89 #define ADF_MSG_SIZE_128 0x04
90 #define ADF_MIN_MSG_SIZE ADF_MSG_SIZE_32
91 #define ADF_MAX_MSG_SIZE ADF_MSG_SIZE_128
93 /* Size to bytes conversion macros for ring and msg size values */
94 #define ADF_MSG_SIZE_TO_BYTES(SIZE) (SIZE << 5)
95 #define ADF_BYTES_TO_MSG_SIZE(SIZE) (SIZE >> 5)
96 #define ADF_SIZE_TO_RING_SIZE_IN_BYTES(SIZE) ((1 << (SIZE - 1)) << 7)
97 #define ADF_RING_SIZE_IN_BYTES_TO_SIZE(SIZE) ((1 << (SIZE - 1)) >> 7)
99 /* Minimum ring bufer size for memory allocation */
100 #define ADF_RING_SIZE_BYTES_MIN(SIZE) \
101 ((SIZE < ADF_SIZE_TO_RING_SIZE_IN_BYTES(ADF_RING_SIZE_4K)) ? \
102 ADF_SIZE_TO_RING_SIZE_IN_BYTES(ADF_RING_SIZE_4K) : SIZE)
103 #define ADF_RING_SIZE_MODULO(SIZE) (SIZE + 0x6)
104 #define ADF_SIZE_TO_POW(SIZE) ((((SIZE & 0x4) >> 1) | ((SIZE & 0x4) >> 2) | \
106 /* Max outstanding requests */
107 #define ADF_MAX_INFLIGHTS(RING_SIZE, MSG_SIZE) \
108 ((((1 << (RING_SIZE - 1)) << 3) >> ADF_SIZE_TO_POW(MSG_SIZE)) - 1)
109 #define BUILD_RING_CONFIG(size) \
110 ((ADF_RING_NEAR_WATERMARK_0 << ADF_RING_CONFIG_NEAR_FULL_WM) \
111 | (ADF_RING_NEAR_WATERMARK_0 << ADF_RING_CONFIG_NEAR_EMPTY_WM) \
113 #define BUILD_RESP_RING_CONFIG(size, watermark_nf, watermark_ne) \
114 ((watermark_nf << ADF_RING_CONFIG_NEAR_FULL_WM) \
115 | (watermark_ne << ADF_RING_CONFIG_NEAR_EMPTY_WM) \
117 #define BUILD_RING_BASE_ADDR(addr, size) \
118 ((addr >> 6) & (0xFFFFFFFFFFFFFFFFULL << size))
119 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \
120 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
121 ADF_RING_CSR_RING_HEAD + (ring << 2))
122 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \
123 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
124 ADF_RING_CSR_RING_TAIL + (ring << 2))
125 #define READ_CSR_E_STAT(csr_base_addr, bank) \
126 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
128 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \
129 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
130 ADF_RING_CSR_RING_CONFIG + (ring << 2), value)
131 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \
133 uint32_t l_base = 0, u_base = 0; \
134 l_base = (uint32_t)(value & 0xFFFFFFFF); \
135 u_base = (uint32_t)((value & 0xFFFFFFFF00000000ULL) >> 32); \
136 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
137 ADF_RING_CSR_RING_LBASE + (ring << 2), l_base); \
138 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
139 ADF_RING_CSR_RING_UBASE + (ring << 2), u_base); \
141 #define WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value) \
142 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
143 ADF_RING_CSR_RING_HEAD + (ring << 2), value)
144 #define WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value) \
145 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
146 ADF_RING_CSR_RING_TAIL + (ring << 2), value)
147 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \
149 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
150 ADF_RING_CSR_INT_SRCSEL, ADF_BANK_INT_SRC_SEL_MASK_0); \
151 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
152 ADF_RING_CSR_INT_SRCSEL_2, ADF_BANK_INT_SRC_SEL_MASK_X); \
154 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \
155 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
156 ADF_RING_CSR_INT_COL_EN, value)
157 #define WRITE_CSR_INT_COL_CTL(csr_base_addr, bank, value) \
158 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
159 ADF_RING_CSR_INT_COL_CTL, \
160 ADF_RING_CSR_INT_COL_CTL_ENABLE | value)
161 #define WRITE_CSR_INT_FLAG_AND_COL(csr_base_addr, bank, value) \
162 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
163 ADF_RING_CSR_INT_FLAG_AND_COL, value)