2 * drivers/clk/at91/clk-slow.c
4 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/clk.h>
14 #include <linux/clk-provider.h>
15 #include <linux/clkdev.h>
16 #include <linux/clk/at91_pmc.h>
17 #include <linux/delay.h>
19 #include <linux/mfd/syscon.h>
20 #include <linux/regmap.h>
25 #define SLOW_CLOCK_FREQ 32768
26 #define SLOWCK_SW_CYCLES 5
27 #define SLOWCK_SW_TIME_USEC ((SLOWCK_SW_CYCLES * USEC_PER_SEC) / \
30 #define AT91_SCKC_CR 0x00
31 #define AT91_SCKC_RCEN (1 << 0)
32 #define AT91_SCKC_OSC32EN (1 << 1)
33 #define AT91_SCKC_OSC32BYP (1 << 2)
34 #define AT91_SCKC_OSCSEL (1 << 3)
39 unsigned long startup_usec;
42 #define to_clk_slow_osc(hw) container_of(hw, struct clk_slow_osc, hw)
44 struct clk_slow_rc_osc {
47 unsigned long frequency;
48 unsigned long accuracy;
49 unsigned long startup_usec;
52 #define to_clk_slow_rc_osc(hw) container_of(hw, struct clk_slow_rc_osc, hw)
54 struct clk_sam9260_slow {
56 struct regmap *regmap;
59 #define to_clk_sam9260_slow(hw) container_of(hw, struct clk_sam9260_slow, hw)
61 struct clk_sam9x5_slow {
67 #define to_clk_sam9x5_slow(hw) container_of(hw, struct clk_sam9x5_slow, hw)
69 static struct clk *slow_clk;
71 static int clk_slow_osc_prepare(struct clk_hw *hw)
73 struct clk_slow_osc *osc = to_clk_slow_osc(hw);
74 void __iomem *sckcr = osc->sckcr;
75 u32 tmp = readl(sckcr);
77 if (tmp & AT91_SCKC_OSC32BYP)
80 writel(tmp | AT91_SCKC_OSC32EN, sckcr);
82 usleep_range(osc->startup_usec, osc->startup_usec + 1);
87 static void clk_slow_osc_unprepare(struct clk_hw *hw)
89 struct clk_slow_osc *osc = to_clk_slow_osc(hw);
90 void __iomem *sckcr = osc->sckcr;
91 u32 tmp = readl(sckcr);
93 if (tmp & AT91_SCKC_OSC32BYP)
96 writel(tmp & ~AT91_SCKC_OSC32EN, sckcr);
99 static int clk_slow_osc_is_prepared(struct clk_hw *hw)
101 struct clk_slow_osc *osc = to_clk_slow_osc(hw);
102 void __iomem *sckcr = osc->sckcr;
103 u32 tmp = readl(sckcr);
105 if (tmp & AT91_SCKC_OSC32BYP)
108 return !!(tmp & AT91_SCKC_OSC32EN);
111 static const struct clk_ops slow_osc_ops = {
112 .prepare = clk_slow_osc_prepare,
113 .unprepare = clk_slow_osc_unprepare,
114 .is_prepared = clk_slow_osc_is_prepared,
117 static struct clk * __init
118 at91_clk_register_slow_osc(void __iomem *sckcr,
120 const char *parent_name,
121 unsigned long startup,
124 struct clk_slow_osc *osc;
125 struct clk *clk = NULL;
126 struct clk_init_data init;
128 if (!sckcr || !name || !parent_name)
129 return ERR_PTR(-EINVAL);
131 osc = kzalloc(sizeof(*osc), GFP_KERNEL);
133 return ERR_PTR(-ENOMEM);
136 init.ops = &slow_osc_ops;
137 init.parent_names = &parent_name;
138 init.num_parents = 1;
139 init.flags = CLK_IGNORE_UNUSED;
141 osc->hw.init = &init;
143 osc->startup_usec = startup;
146 writel((readl(sckcr) & ~AT91_SCKC_OSC32EN) | AT91_SCKC_OSC32BYP,
149 clk = clk_register(NULL, &osc->hw);
156 void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np,
160 const char *parent_name;
161 const char *name = np->name;
165 parent_name = of_clk_get_parent_name(np, 0);
166 of_property_read_string(np, "clock-output-names", &name);
167 of_property_read_u32(np, "atmel,startup-time-usec", &startup);
168 bypass = of_property_read_bool(np, "atmel,osc-bypass");
170 clk = at91_clk_register_slow_osc(sckcr, name, parent_name, startup,
175 of_clk_add_provider(np, of_clk_src_simple_get, clk);
178 static unsigned long clk_slow_rc_osc_recalc_rate(struct clk_hw *hw,
179 unsigned long parent_rate)
181 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
183 return osc->frequency;
186 static unsigned long clk_slow_rc_osc_recalc_accuracy(struct clk_hw *hw,
187 unsigned long parent_acc)
189 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
191 return osc->accuracy;
194 static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
196 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
197 void __iomem *sckcr = osc->sckcr;
199 writel(readl(sckcr) | AT91_SCKC_RCEN, sckcr);
201 usleep_range(osc->startup_usec, osc->startup_usec + 1);
206 static void clk_slow_rc_osc_unprepare(struct clk_hw *hw)
208 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
209 void __iomem *sckcr = osc->sckcr;
211 writel(readl(sckcr) & ~AT91_SCKC_RCEN, sckcr);
214 static int clk_slow_rc_osc_is_prepared(struct clk_hw *hw)
216 struct clk_slow_rc_osc *osc = to_clk_slow_rc_osc(hw);
218 return !!(readl(osc->sckcr) & AT91_SCKC_RCEN);
221 static const struct clk_ops slow_rc_osc_ops = {
222 .prepare = clk_slow_rc_osc_prepare,
223 .unprepare = clk_slow_rc_osc_unprepare,
224 .is_prepared = clk_slow_rc_osc_is_prepared,
225 .recalc_rate = clk_slow_rc_osc_recalc_rate,
226 .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy,
229 static struct clk * __init
230 at91_clk_register_slow_rc_osc(void __iomem *sckcr,
232 unsigned long frequency,
233 unsigned long accuracy,
234 unsigned long startup)
236 struct clk_slow_rc_osc *osc;
237 struct clk *clk = NULL;
238 struct clk_init_data init;
241 return ERR_PTR(-EINVAL);
243 osc = kzalloc(sizeof(*osc), GFP_KERNEL);
245 return ERR_PTR(-ENOMEM);
248 init.ops = &slow_rc_osc_ops;
249 init.parent_names = NULL;
250 init.num_parents = 0;
251 init.flags = CLK_IS_ROOT | CLK_IGNORE_UNUSED;
253 osc->hw.init = &init;
255 osc->frequency = frequency;
256 osc->accuracy = accuracy;
257 osc->startup_usec = startup;
259 clk = clk_register(NULL, &osc->hw);
266 void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np,
273 const char *name = np->name;
275 of_property_read_string(np, "clock-output-names", &name);
276 of_property_read_u32(np, "clock-frequency", &frequency);
277 of_property_read_u32(np, "clock-accuracy", &accuracy);
278 of_property_read_u32(np, "atmel,startup-time-usec", &startup);
280 clk = at91_clk_register_slow_rc_osc(sckcr, name, frequency, accuracy,
285 of_clk_add_provider(np, of_clk_src_simple_get, clk);
288 static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
290 struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
291 void __iomem *sckcr = slowck->sckcr;
299 if ((!index && !(tmp & AT91_SCKC_OSCSEL)) ||
300 (index && (tmp & AT91_SCKC_OSCSEL)))
304 tmp |= AT91_SCKC_OSCSEL;
306 tmp &= ~AT91_SCKC_OSCSEL;
310 usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
315 static u8 clk_sam9x5_slow_get_parent(struct clk_hw *hw)
317 struct clk_sam9x5_slow *slowck = to_clk_sam9x5_slow(hw);
319 return !!(readl(slowck->sckcr) & AT91_SCKC_OSCSEL);
322 static const struct clk_ops sam9x5_slow_ops = {
323 .set_parent = clk_sam9x5_slow_set_parent,
324 .get_parent = clk_sam9x5_slow_get_parent,
327 static struct clk * __init
328 at91_clk_register_sam9x5_slow(void __iomem *sckcr,
330 const char **parent_names,
333 struct clk_sam9x5_slow *slowck;
334 struct clk *clk = NULL;
335 struct clk_init_data init;
337 if (!sckcr || !name || !parent_names || !num_parents)
338 return ERR_PTR(-EINVAL);
340 slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
342 return ERR_PTR(-ENOMEM);
345 init.ops = &sam9x5_slow_ops;
346 init.parent_names = parent_names;
347 init.num_parents = num_parents;
350 slowck->hw.init = &init;
351 slowck->sckcr = sckcr;
352 slowck->parent = !!(readl(sckcr) & AT91_SCKC_OSCSEL);
354 clk = clk_register(NULL, &slowck->hw);
363 void __init of_at91sam9x5_clk_slow_setup(struct device_node *np,
367 const char *parent_names[2];
369 const char *name = np->name;
371 num_parents = of_clk_get_parent_count(np);
372 if (num_parents <= 0 || num_parents > 2)
375 of_clk_parent_fill(np, parent_names, num_parents);
377 of_property_read_string(np, "clock-output-names", &name);
379 clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names,
384 of_clk_add_provider(np, of_clk_src_simple_get, clk);
387 static u8 clk_sam9260_slow_get_parent(struct clk_hw *hw)
389 struct clk_sam9260_slow *slowck = to_clk_sam9260_slow(hw);
392 regmap_read(slowck->regmap, AT91_PMC_SR, &status);
394 return status & AT91_PMC_OSCSEL ? 1 : 0;
397 static const struct clk_ops sam9260_slow_ops = {
398 .get_parent = clk_sam9260_slow_get_parent,
401 static struct clk * __init
402 at91_clk_register_sam9260_slow(struct regmap *regmap,
404 const char **parent_names,
407 struct clk_sam9260_slow *slowck;
408 struct clk *clk = NULL;
409 struct clk_init_data init;
412 return ERR_PTR(-EINVAL);
414 if (!parent_names || !num_parents)
415 return ERR_PTR(-EINVAL);
417 slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
419 return ERR_PTR(-ENOMEM);
422 init.ops = &sam9260_slow_ops;
423 init.parent_names = parent_names;
424 init.num_parents = num_parents;
427 slowck->hw.init = &init;
428 slowck->regmap = regmap;
430 clk = clk_register(NULL, &slowck->hw);
439 static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
442 const char *parent_names[2];
444 const char *name = np->name;
445 struct regmap *regmap;
447 num_parents = of_clk_get_parent_count(np);
448 if (num_parents != 2)
451 of_clk_parent_fill(np, parent_names, num_parents);
452 regmap = syscon_node_to_regmap(of_get_parent(np));
456 of_property_read_string(np, "clock-output-names", &name);
458 clk = at91_clk_register_sam9260_slow(regmap, name, parent_names,
463 of_clk_add_provider(np, of_clk_src_simple_get, clk);
465 CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",
466 of_at91sam9260_clk_slow_setup);
469 * FIXME: All slow clk users are not properly claiming it (get + prepare +
470 * enable) before using it.
471 * If all users properly claiming this clock decide that they don't need it
472 * anymore (or are removed), it is disabled while faulty users are still
473 * requiring it, and the system hangs.
474 * Prevent this clock from being disabled until all users are properly
476 * Once this is done we should remove this function and the slow_clk variable.
478 static int __init of_at91_clk_slow_retain(void)
484 clk_prepare_enable(slow_clk);
488 arch_initcall(of_at91_clk_slow_retain);