1 #ifndef __KVM_X86_LAPIC_H
2 #define __KVM_X86_LAPIC_H
6 #include <linux/kvm_host.h>
8 #define KVM_APIC_INIT 0
9 #define KVM_APIC_SIPI 1
13 s64 period; /* unit: ns */
17 u64 expired_tscdeadline;
18 atomic_t pending; /* accumulated triggered timers */
23 unsigned long base_address;
24 struct kvm_io_device dev;
25 struct kvm_timer lapic_timer;
27 struct kvm_vcpu *vcpu;
30 bool lvt0_in_nmi_mode;
31 /* Number of bits set in ISR. */
33 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
34 int highest_isr_cache;
36 * APIC register page. The layout matches the register layout seen by
37 * the guest 1:1, because it is accessed by the vmx microcode.
38 * Note: Only one register, the TPR, is used by the microcode.
42 struct gfn_to_hva_cache vapic_cache;
43 unsigned long pending_events;
44 unsigned int sipi_vector;
46 int kvm_create_lapic(struct kvm_vcpu *vcpu);
47 void kvm_free_lapic(struct kvm_vcpu *vcpu);
49 int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
50 int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
51 int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
52 void kvm_apic_accept_events(struct kvm_vcpu *vcpu);
53 void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event);
54 u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
55 void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
56 void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
57 void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
58 u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
59 void kvm_apic_set_version(struct kvm_vcpu *vcpu);
61 void __kvm_apic_update_irr(u32 *pir, void *regs);
62 void kvm_apic_update_irr(struct kvm_vcpu *vcpu, u32 *pir);
63 int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq,
64 unsigned long *dest_map);
65 int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
67 bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
68 struct kvm_lapic_irq *irq, int *r, unsigned long *dest_map);
70 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
71 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
72 void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
73 struct kvm_lapic_state *s);
74 int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
76 u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
77 void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
79 void kvm_apic_write_nodecode(struct kvm_vcpu *vcpu, u32 offset);
80 void kvm_apic_set_eoi_accelerated(struct kvm_vcpu *vcpu, int vector);
82 int kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
83 void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
84 void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
86 int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
87 int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
89 int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
90 int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
92 static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
94 return vcpu->arch.hyperv.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
97 int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
98 void kvm_lapic_init(void);
99 void kvm_lapic_exit(void);
101 static inline u32 kvm_apic_get_reg(struct kvm_lapic *apic, int reg_off)
103 return *((u32 *) (apic->regs + reg_off));
106 extern struct static_key kvm_no_apic_vcpu;
108 static inline bool kvm_vcpu_has_lapic(struct kvm_vcpu *vcpu)
110 if (static_key_false(&kvm_no_apic_vcpu))
111 return vcpu->arch.apic;
115 extern struct static_key_deferred apic_hw_disabled;
117 static inline int kvm_apic_hw_enabled(struct kvm_lapic *apic)
119 if (static_key_false(&apic_hw_disabled.key))
120 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
121 return MSR_IA32_APICBASE_ENABLE;
124 extern struct static_key_deferred apic_sw_disabled;
126 static inline bool kvm_apic_sw_enabled(struct kvm_lapic *apic)
128 if (static_key_false(&apic_sw_disabled.key))
129 return apic->sw_enabled;
133 static inline bool kvm_apic_present(struct kvm_vcpu *vcpu)
135 return kvm_vcpu_has_lapic(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
138 static inline int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
140 return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
143 static inline int apic_x2apic_mode(struct kvm_lapic *apic)
145 return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
148 static inline bool kvm_vcpu_apic_vid_enabled(struct kvm_vcpu *vcpu)
150 return kvm_x86_ops->cpu_uses_apicv(vcpu);
153 static inline bool kvm_apic_has_events(struct kvm_vcpu *vcpu)
155 return kvm_vcpu_has_lapic(vcpu) && vcpu->arch.apic->pending_events;
158 static inline bool kvm_lowest_prio_delivery(struct kvm_lapic_irq *irq)
160 return (irq->delivery_mode == APIC_DM_LOWEST ||
161 irq->msi_redir_hint);
164 static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
166 return kvm_vcpu_has_lapic(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
169 bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
171 void wait_lapic_expire(struct kvm_vcpu *vcpu);
173 bool kvm_intr_is_single_vcpu_fast(struct kvm *kvm, struct kvm_lapic_irq *irq,
174 struct kvm_vcpu **dest_vcpu);
175 void kvm_lapic_switch_to_sw_timer(struct kvm_vcpu *vcpu);
176 void kvm_lapic_switch_to_hv_timer(struct kvm_vcpu *vcpu);
177 void kvm_lapic_expired_hv_timer(struct kvm_vcpu *vcpu);
178 bool kvm_lapic_hv_timer_in_use(struct kvm_vcpu *vcpu);