2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 * Copyright (C) 2011 Don Zickus Red Hat, Inc.
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * Handle hardware traps and faults.
13 #include <linux/spinlock.h>
14 #include <linux/kprobes.h>
15 #include <linux/kdebug.h>
16 #include <linux/nmi.h>
17 #include <linux/debugfs.h>
18 #include <linux/delay.h>
19 #include <linux/hardirq.h>
20 #include <linux/slab.h>
21 #include <linux/export.h>
23 #if defined(CONFIG_EDAC)
24 #include <linux/edac.h>
27 #include <linux/atomic.h>
28 #include <asm/traps.h>
29 #include <asm/mach_traps.h>
31 #include <asm/x86_init.h>
33 #define CREATE_TRACE_POINTS
34 #include <trace/events/nmi.h>
38 struct list_head head;
41 static struct nmi_desc nmi_desc[NMI_MAX] =
44 .lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[0].lock),
45 .head = LIST_HEAD_INIT(nmi_desc[0].head),
48 .lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[1].lock),
49 .head = LIST_HEAD_INIT(nmi_desc[1].head),
52 .lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[2].lock),
53 .head = LIST_HEAD_INIT(nmi_desc[2].head),
56 .lock = __SPIN_LOCK_UNLOCKED(&nmi_desc[3].lock),
57 .head = LIST_HEAD_INIT(nmi_desc[3].head),
65 unsigned int external;
69 static DEFINE_PER_CPU(struct nmi_stats, nmi_stats);
71 static int ignore_nmis;
73 int unknown_nmi_panic;
75 * Prevent NMI reason port (0x61) being accessed simultaneously, can
76 * only be used in NMI handler.
78 static DEFINE_RAW_SPINLOCK(nmi_reason_lock);
80 static int __init setup_unknown_nmi_panic(char *str)
82 unknown_nmi_panic = 1;
85 __setup("unknown_nmi_panic", setup_unknown_nmi_panic);
87 #define nmi_to_desc(type) (&nmi_desc[type])
89 static u64 nmi_longest_ns = 1 * NSEC_PER_MSEC;
91 static int __init nmi_warning_debugfs(void)
93 debugfs_create_u64("nmi_longest_ns", 0644,
94 arch_debugfs_dir, &nmi_longest_ns);
97 fs_initcall(nmi_warning_debugfs);
99 static void nmi_max_handler(struct irq_work *w)
101 struct nmiaction *a = container_of(w, struct nmiaction, irq_work);
102 int remainder_ns, decimal_msecs;
103 u64 whole_msecs = ACCESS_ONCE(a->max_duration);
105 remainder_ns = do_div(whole_msecs, (1000 * 1000));
106 decimal_msecs = remainder_ns / 1000;
108 printk_ratelimited(KERN_INFO
109 "INFO: NMI handler (%ps) took too long to run: %lld.%03d msecs\n",
110 a->handler, whole_msecs, decimal_msecs);
113 static int nmi_handle(unsigned int type, struct pt_regs *regs)
115 struct nmi_desc *desc = nmi_to_desc(type);
122 * NMIs are edge-triggered, which means if you have enough
123 * of them concurrently, you can lose some because only one
124 * can be latched at any given time. Walk the whole list
125 * to handle those situations.
127 list_for_each_entry_rcu(a, &desc->head, list) {
131 delta = sched_clock();
132 thishandled = a->handler(type, regs);
133 handled += thishandled;
134 delta = sched_clock() - delta;
135 trace_nmi_handler(a->handler, (int)delta, thishandled);
137 if (delta < nmi_longest_ns || delta < a->max_duration)
140 a->max_duration = delta;
141 irq_work_queue(&a->irq_work);
146 /* return total number of NMI events handled */
149 NOKPROBE_SYMBOL(nmi_handle);
151 int __register_nmi_handler(unsigned int type, struct nmiaction *action)
153 struct nmi_desc *desc = nmi_to_desc(type);
156 if (!action->handler)
159 init_irq_work(&action->irq_work, nmi_max_handler);
161 spin_lock_irqsave(&desc->lock, flags);
164 * most handlers of type NMI_UNKNOWN never return because
165 * they just assume the NMI is theirs. Just a sanity check
166 * to manage expectations
168 WARN_ON_ONCE(type == NMI_UNKNOWN && !list_empty(&desc->head));
169 WARN_ON_ONCE(type == NMI_SERR && !list_empty(&desc->head));
170 WARN_ON_ONCE(type == NMI_IO_CHECK && !list_empty(&desc->head));
173 * some handlers need to be executed first otherwise a fake
174 * event confuses some handlers (kdump uses this flag)
176 if (action->flags & NMI_FLAG_FIRST)
177 list_add_rcu(&action->list, &desc->head);
179 list_add_tail_rcu(&action->list, &desc->head);
181 spin_unlock_irqrestore(&desc->lock, flags);
184 EXPORT_SYMBOL(__register_nmi_handler);
186 void unregister_nmi_handler(unsigned int type, const char *name)
188 struct nmi_desc *desc = nmi_to_desc(type);
192 spin_lock_irqsave(&desc->lock, flags);
194 list_for_each_entry_rcu(n, &desc->head, list) {
196 * the name passed in to describe the nmi handler
197 * is used as the lookup key
199 if (!strcmp(n->name, name)) {
201 "Trying to free NMI (%s) from NMI context!\n", n->name);
202 list_del_rcu(&n->list);
207 spin_unlock_irqrestore(&desc->lock, flags);
210 EXPORT_SYMBOL_GPL(unregister_nmi_handler);
213 pci_serr_error(unsigned char reason, struct pt_regs *regs)
215 /* check to see if anyone registered against these types of errors */
216 if (nmi_handle(NMI_SERR, regs))
219 pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n",
220 reason, smp_processor_id());
223 * On some machines, PCI SERR line is used to report memory
224 * errors. EDAC makes use of it.
226 #if defined(CONFIG_EDAC)
227 if (edac_handler_set()) {
228 edac_atomic_assert_error();
233 if (panic_on_unrecovered_nmi)
234 nmi_panic(regs, "NMI: Not continuing");
236 pr_emerg("Dazed and confused, but trying to continue\n");
238 /* Clear and disable the PCI SERR error line. */
239 reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_SERR;
240 outb(reason, NMI_REASON_PORT);
242 NOKPROBE_SYMBOL(pci_serr_error);
245 io_check_error(unsigned char reason, struct pt_regs *regs)
249 /* check to see if anyone registered against these types of errors */
250 if (nmi_handle(NMI_IO_CHECK, regs))
254 "NMI: IOCK error (debug interrupt?) for reason %02x on CPU %d.\n",
255 reason, smp_processor_id());
258 if (panic_on_io_nmi) {
259 nmi_panic(regs, "NMI IOCK error: Not continuing");
262 * If we end up here, it means we have received an NMI while
263 * processing panic(). Simply return without delaying and
269 /* Re-enable the IOCK line, wait for a few seconds */
270 reason = (reason & NMI_REASON_CLEAR_MASK) | NMI_REASON_CLEAR_IOCHK;
271 outb(reason, NMI_REASON_PORT);
275 touch_nmi_watchdog();
279 reason &= ~NMI_REASON_CLEAR_IOCHK;
280 outb(reason, NMI_REASON_PORT);
282 NOKPROBE_SYMBOL(io_check_error);
285 unknown_nmi_error(unsigned char reason, struct pt_regs *regs)
290 * Use 'false' as back-to-back NMIs are dealt with one level up.
291 * Of course this makes having multiple 'unknown' handlers useless
292 * as only the first one is ever run (unless it can actually determine
293 * if it caused the NMI)
295 handled = nmi_handle(NMI_UNKNOWN, regs);
297 __this_cpu_add(nmi_stats.unknown, handled);
301 __this_cpu_add(nmi_stats.unknown, 1);
303 pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
304 reason, smp_processor_id());
306 pr_emerg("Do you have a strange power saving mode enabled?\n");
307 if (unknown_nmi_panic || panic_on_unrecovered_nmi)
308 nmi_panic(regs, "NMI: Not continuing");
310 pr_emerg("Dazed and confused, but trying to continue\n");
312 NOKPROBE_SYMBOL(unknown_nmi_error);
314 static DEFINE_PER_CPU(bool, swallow_nmi);
315 static DEFINE_PER_CPU(unsigned long, last_nmi_rip);
317 static void default_do_nmi(struct pt_regs *regs)
319 unsigned char reason = 0;
324 * CPU-specific NMI must be processed before non-CPU-specific
325 * NMI, otherwise we may lose it, because the CPU-specific
326 * NMI can not be detected/processed on other CPUs.
330 * Back-to-back NMIs are interesting because they can either
331 * be two NMI or more than two NMIs (any thing over two is dropped
332 * due to NMI being edge-triggered). If this is the second half
333 * of the back-to-back NMI, assume we dropped things and process
334 * more handlers. Otherwise reset the 'swallow' NMI behaviour
336 if (regs->ip == __this_cpu_read(last_nmi_rip))
339 __this_cpu_write(swallow_nmi, false);
341 __this_cpu_write(last_nmi_rip, regs->ip);
343 handled = nmi_handle(NMI_LOCAL, regs);
344 __this_cpu_add(nmi_stats.normal, handled);
347 * There are cases when a NMI handler handles multiple
348 * events in the current NMI. One of these events may
349 * be queued for in the next NMI. Because the event is
350 * already handled, the next NMI will result in an unknown
351 * NMI. Instead lets flag this for a potential NMI to
355 __this_cpu_write(swallow_nmi, true);
359 /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */
360 raw_spin_lock(&nmi_reason_lock);
361 reason = x86_platform.get_nmi_reason();
363 if (reason & NMI_REASON_MASK) {
364 if (reason & NMI_REASON_SERR)
365 pci_serr_error(reason, regs);
366 else if (reason & NMI_REASON_IOCHK)
367 io_check_error(reason, regs);
370 * Reassert NMI in case it became active
371 * meanwhile as it's edge-triggered:
375 __this_cpu_add(nmi_stats.external, 1);
376 raw_spin_unlock(&nmi_reason_lock);
379 raw_spin_unlock(&nmi_reason_lock);
382 * Only one NMI can be latched at a time. To handle
383 * this we may process multiple nmi handlers at once to
384 * cover the case where an NMI is dropped. The downside
385 * to this approach is we may process an NMI prematurely,
386 * while its real NMI is sitting latched. This will cause
387 * an unknown NMI on the next run of the NMI processing.
389 * We tried to flag that condition above, by setting the
390 * swallow_nmi flag when we process more than one event.
391 * This condition is also only present on the second half
392 * of a back-to-back NMI, so we flag that condition too.
394 * If both are true, we assume we already processed this
395 * NMI previously and we swallow it. Otherwise we reset
398 * There are scenarios where we may accidentally swallow
399 * a 'real' unknown NMI. For example, while processing
400 * a perf NMI another perf NMI comes in along with a
401 * 'real' unknown NMI. These two NMIs get combined into
402 * one (as descibed above). When the next NMI gets
403 * processed, it will be flagged by perf as handled, but
404 * noone will know that there was a 'real' unknown NMI sent
405 * also. As a result it gets swallowed. Or if the first
406 * perf NMI returns two events handled then the second
407 * NMI will get eaten by the logic below, again losing a
408 * 'real' unknown NMI. But this is the best we can do
411 if (b2b && __this_cpu_read(swallow_nmi))
412 __this_cpu_add(nmi_stats.swallow, 1);
414 unknown_nmi_error(reason, regs);
416 NOKPROBE_SYMBOL(default_do_nmi);
419 * NMIs can page fault or hit breakpoints which will cause it to lose
420 * its NMI context with the CPU when the breakpoint or page fault does an IRET.
422 * As a result, NMIs can nest if NMIs get unmasked due an IRET during
423 * NMI processing. On x86_64, the asm glue protects us from nested NMIs
424 * if the outer NMI came from kernel mode, but we can still nest if the
425 * outer NMI came from user mode.
427 * To handle these nested NMIs, we have three states:
433 * When no NMI is in progress, it is in the "not running" state.
434 * When an NMI comes in, it goes into the "executing" state.
435 * Normally, if another NMI is triggered, it does not interrupt
436 * the running NMI and the HW will simply latch it so that when
437 * the first NMI finishes, it will restart the second NMI.
438 * (Note, the latch is binary, thus multiple NMIs triggering,
439 * when one is running, are ignored. Only one NMI is restarted.)
441 * If an NMI executes an iret, another NMI can preempt it. We do not
442 * want to allow this new NMI to run, but we want to execute it when the
443 * first one finishes. We set the state to "latched", and the exit of
444 * the first NMI will perform a dec_return, if the result is zero
445 * (NOT_RUNNING), then it will simply exit the NMI handler. If not, the
446 * dec_return would have set the state to NMI_EXECUTING (what we want it
447 * to be when we are running). In this case, we simply jump back to
448 * rerun the NMI handler again, and restart the 'latched' NMI.
450 * No trap (breakpoint or page fault) should be hit before nmi_restart,
451 * thus there is no race between the first check of state for NOT_RUNNING
452 * and setting it to NMI_EXECUTING. The HW will prevent nested NMIs
455 * In case the NMI takes a page fault, we need to save off the CR2
456 * because the NMI could have preempted another page fault and corrupt
457 * the CR2 that is about to be read. As nested NMIs must be restarted
458 * and they can not take breakpoints or page faults, the update of the
459 * CR2 must be done before converting the nmi state back to NOT_RUNNING.
460 * Otherwise, there would be a race of another nested NMI coming in
461 * after setting state to NOT_RUNNING but before updating the nmi_cr2.
468 static DEFINE_PER_CPU(enum nmi_states, nmi_state);
469 static DEFINE_PER_CPU(unsigned long, nmi_cr2);
473 * In x86_64, we need to handle breakpoint -> NMI -> breakpoint. Without
474 * some care, the inner breakpoint will clobber the outer breakpoint's
477 * If a breakpoint is being processed, and the debug stack is being
478 * used, if an NMI comes in and also hits a breakpoint, the stack
479 * pointer will be set to the same fixed address as the breakpoint that
480 * was interrupted, causing that stack to be corrupted. To handle this
481 * case, check if the stack that was interrupted is the debug stack, and
482 * if so, change the IDT so that new breakpoints will use the current
483 * stack and not switch to the fixed address. On return of the NMI,
484 * switch back to the original IDT.
486 static DEFINE_PER_CPU(int, update_debug_stack);
489 dotraplinkage notrace void
490 do_nmi(struct pt_regs *regs, long error_code)
492 if (this_cpu_read(nmi_state) != NMI_NOT_RUNNING) {
493 this_cpu_write(nmi_state, NMI_LATCHED);
496 this_cpu_write(nmi_state, NMI_EXECUTING);
497 this_cpu_write(nmi_cr2, read_cr2());
502 * If we interrupted a breakpoint, it is possible that
503 * the nmi handler will have breakpoints too. We need to
504 * change the IDT such that breakpoints that happen here
505 * continue to use the NMI stack.
507 if (unlikely(is_debug_stack(regs->sp))) {
508 debug_stack_set_zero();
509 this_cpu_write(update_debug_stack, 1);
515 inc_irq_stat(__nmi_count);
518 default_do_nmi(regs);
523 if (unlikely(this_cpu_read(update_debug_stack))) {
525 this_cpu_write(update_debug_stack, 0);
529 if (unlikely(this_cpu_read(nmi_cr2) != read_cr2()))
530 write_cr2(this_cpu_read(nmi_cr2));
531 if (this_cpu_dec_return(nmi_state))
534 NOKPROBE_SYMBOL(do_nmi);
541 void restart_nmi(void)
546 /* reset the back-to-back NMI logic */
547 void local_touch_nmi(void)
549 __this_cpu_write(last_nmi_rip, 0);
551 EXPORT_SYMBOL_GPL(local_touch_nmi);