2 * Copyright IBM Corporation 2001, 2005, 2006
3 * Copyright Dave Engebretsen & Todd Inglett 2001
4 * Copyright Linas Vepstas 2005, 2006
5 * Copyright 2001-2012 IBM Corporation.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
24 #include <linux/delay.h>
25 #include <linux/debugfs.h>
26 #include <linux/sched.h>
27 #include <linux/init.h>
28 #include <linux/list.h>
29 #include <linux/pci.h>
30 #include <linux/iommu.h>
31 #include <linux/proc_fs.h>
32 #include <linux/rbtree.h>
33 #include <linux/reboot.h>
34 #include <linux/seq_file.h>
35 #include <linux/spinlock.h>
36 #include <linux/export.h>
39 #include <linux/atomic.h>
40 #include <asm/debug.h>
42 #include <asm/eeh_event.h>
44 #include <asm/iommu.h>
45 #include <asm/machdep.h>
46 #include <asm/ppc-pci.h>
51 * EEH, or "Extended Error Handling" is a PCI bridge technology for
52 * dealing with PCI bus errors that can't be dealt with within the
53 * usual PCI framework, except by check-stopping the CPU. Systems
54 * that are designed for high-availability/reliability cannot afford
55 * to crash due to a "mere" PCI error, thus the need for EEH.
56 * An EEH-capable bridge operates by converting a detected error
57 * into a "slot freeze", taking the PCI adapter off-line, making
58 * the slot behave, from the OS'es point of view, as if the slot
59 * were "empty": all reads return 0xff's and all writes are silently
60 * ignored. EEH slot isolation events can be triggered by parity
61 * errors on the address or data busses (e.g. during posted writes),
62 * which in turn might be caused by low voltage on the bus, dust,
63 * vibration, humidity, radioactivity or plain-old failed hardware.
65 * Note, however, that one of the leading causes of EEH slot
66 * freeze events are buggy device drivers, buggy device microcode,
67 * or buggy device hardware. This is because any attempt by the
68 * device to bus-master data to a memory address that is not
69 * assigned to the device will trigger a slot freeze. (The idea
70 * is to prevent devices-gone-wild from corrupting system memory).
71 * Buggy hardware/drivers will have a miserable time co-existing
74 * Ideally, a PCI device driver, when suspecting that an isolation
75 * event has occurred (e.g. by reading 0xff's), will then ask EEH
76 * whether this is the case, and then take appropriate steps to
77 * reset the PCI slot, the PCI device, and then resume operations.
78 * However, until that day, the checking is done here, with the
79 * eeh_check_failure() routine embedded in the MMIO macros. If
80 * the slot is found to be isolated, an "EEH Event" is synthesized
81 * and sent out for processing.
84 /* If a device driver keeps reading an MMIO register in an interrupt
85 * handler after a slot isolation event, it might be broken.
86 * This sets the threshold for how many read attempts we allow
87 * before printing an error message.
89 #define EEH_MAX_FAILS 2100000
91 /* Time to wait for a PCI slot to report status, in milliseconds */
92 #define PCI_BUS_RESET_WAIT_MSEC (5*60*1000)
95 * EEH probe mode support, which is part of the flags,
96 * is to support multiple platforms for EEH. Some platforms
97 * like pSeries do PCI emunation based on device tree.
98 * However, other platforms like powernv probe PCI devices
99 * from hardware. The flag is used to distinguish that.
100 * In addition, struct eeh_ops::probe would be invoked for
101 * particular OF node or PCI device so that the corresponding
102 * PE would be created there.
104 int eeh_subsystem_flags;
105 EXPORT_SYMBOL(eeh_subsystem_flags);
108 * EEH allowed maximal frozen times. If one particular PE's
109 * frozen count in last hour exceeds this limit, the PE will
110 * be forced to be offline permanently.
112 int eeh_max_freezes = 5;
114 /* Platform dependent EEH operations */
115 struct eeh_ops *eeh_ops = NULL;
117 /* Lock to avoid races due to multiple reports of an error */
118 DEFINE_RAW_SPINLOCK(confirm_error_lock);
120 /* Lock to protect passed flags */
121 static DEFINE_MUTEX(eeh_dev_mutex);
123 /* Buffer for reporting pci register dumps. Its here in BSS, and
124 * not dynamically alloced, so that it ends up in RMO where RTAS
127 #define EEH_PCI_REGS_LOG_LEN 8192
128 static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
131 * The struct is used to maintain the EEH global statistic
132 * information. Besides, the EEH global statistics will be
133 * exported to user space through procfs
136 u64 no_device; /* PCI device not found */
137 u64 no_dn; /* OF node not found */
138 u64 no_cfg_addr; /* Config address not found */
139 u64 ignored_check; /* EEH check skipped */
140 u64 total_mmio_ffs; /* Total EEH checks */
141 u64 false_positives; /* Unnecessary EEH checks */
142 u64 slot_resets; /* PE reset */
145 static struct eeh_stats eeh_stats;
147 #define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
149 static int __init eeh_setup(char *str)
151 if (!strcmp(str, "off"))
152 eeh_add_flag(EEH_FORCE_DISABLED);
153 else if (!strcmp(str, "early_log"))
154 eeh_add_flag(EEH_EARLY_DUMP_LOG);
158 __setup("eeh=", eeh_setup);
161 * This routine captures assorted PCI configuration space data
162 * for the indicated PCI device, and puts them into a buffer
163 * for RTAS error logging.
165 static size_t eeh_dump_dev_log(struct eeh_dev *edev, char *buf, size_t len)
167 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
173 n += scnprintf(buf+n, len-n, "%04x:%02x:%02x:%01x\n",
174 edev->phb->global_number, pdn->busno,
175 PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
176 pr_warn("EEH: of node=%04x:%02x:%02x:%01x\n",
177 edev->phb->global_number, pdn->busno,
178 PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
180 eeh_ops->read_config(pdn, PCI_VENDOR_ID, 4, &cfg);
181 n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
182 pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
184 eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cfg);
185 n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
186 pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
188 /* Gather bridge-specific registers */
189 if (edev->mode & EEH_DEV_BRIDGE) {
190 eeh_ops->read_config(pdn, PCI_SEC_STATUS, 2, &cfg);
191 n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
192 pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
194 eeh_ops->read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg);
195 n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
196 pr_warn("EEH: Bridge control: %04x\n", cfg);
199 /* Dump out the PCI-X command and status regs */
200 cap = edev->pcix_cap;
202 eeh_ops->read_config(pdn, cap, 4, &cfg);
203 n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
204 pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
206 eeh_ops->read_config(pdn, cap+4, 4, &cfg);
207 n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
208 pr_warn("EEH: PCI-X status: %08x\n", cfg);
211 /* If PCI-E capable, dump PCI-E cap 10 */
212 cap = edev->pcie_cap;
214 n += scnprintf(buf+n, len-n, "pci-e cap10:\n");
215 pr_warn("EEH: PCI-E capabilities and status follow:\n");
217 for (i=0; i<=8; i++) {
218 eeh_ops->read_config(pdn, cap+4*i, 4, &cfg);
219 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
223 pr_warn("%s\n", buffer);
225 l = scnprintf(buffer, sizeof(buffer),
226 "EEH: PCI-E %02x: %08x ",
229 l += scnprintf(buffer+l, sizeof(buffer)-l,
235 pr_warn("%s\n", buffer);
238 /* If AER capable, dump it */
241 n += scnprintf(buf+n, len-n, "pci-e AER:\n");
242 pr_warn("EEH: PCI-E AER capability register set follows:\n");
244 for (i=0; i<=13; i++) {
245 eeh_ops->read_config(pdn, cap+4*i, 4, &cfg);
246 n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
250 pr_warn("%s\n", buffer);
252 l = scnprintf(buffer, sizeof(buffer),
253 "EEH: PCI-E AER %02x: %08x ",
256 l += scnprintf(buffer+l, sizeof(buffer)-l,
261 pr_warn("%s\n", buffer);
267 static void *eeh_dump_pe_log(void *data, void *flag)
269 struct eeh_pe *pe = data;
270 struct eeh_dev *edev, *tmp;
273 /* If the PE's config space is blocked, 0xFF's will be
274 * returned. It's pointless to collect the log in this
277 if (pe->state & EEH_PE_CFG_BLOCKED)
280 eeh_pe_for_each_dev(pe, edev, tmp)
281 *plen += eeh_dump_dev_log(edev, pci_regs_buf + *plen,
282 EEH_PCI_REGS_LOG_LEN - *plen);
288 * eeh_slot_error_detail - Generate combined log including driver log and error log
290 * @severity: temporary or permanent error log
292 * This routine should be called to generate the combined log, which
293 * is comprised of driver log and error log. The driver log is figured
294 * out from the config space of the corresponding PCI device, while
295 * the error log is fetched through platform dependent function call.
297 void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
302 * When the PHB is fenced or dead, it's pointless to collect
303 * the data from PCI config space because it should return
304 * 0xFF's. For ER, we still retrieve the data from the PCI
307 * For pHyp, we have to enable IO for log retrieval. Otherwise,
308 * 0xFF's is always returned from PCI config space.
310 if (!(pe->type & EEH_PE_PHB)) {
311 if (eeh_has_flag(EEH_ENABLE_IO_FOR_LOG))
312 eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
313 eeh_ops->configure_bridge(pe);
314 eeh_pe_restore_bars(pe);
317 eeh_pe_traverse(pe, eeh_dump_pe_log, &loglen);
320 eeh_ops->get_log(pe, severity, pci_regs_buf, loglen);
324 * eeh_token_to_phys - Convert EEH address token to phys address
325 * @token: I/O token, should be address in the form 0xA....
327 * This routine should be called to convert virtual I/O address
330 static inline unsigned long eeh_token_to_phys(unsigned long token)
337 * We won't find hugepages here(this is iomem). Hence we are not
338 * worried about _PAGE_SPLITTING/collapse. Also we will not hit
339 * page table free, because of init_mm.
341 ptep = __find_linux_pte_or_hugepte(init_mm.pgd, token, &hugepage_shift);
344 WARN_ON(hugepage_shift);
345 pa = pte_pfn(*ptep) << PAGE_SHIFT;
347 return pa | (token & (PAGE_SIZE-1));
351 * On PowerNV platform, we might already have fenced PHB there.
352 * For that case, it's meaningless to recover frozen PE. Intead,
353 * We have to handle fenced PHB firstly.
355 static int eeh_phb_check_failure(struct eeh_pe *pe)
357 struct eeh_pe *phb_pe;
361 if (!eeh_has_flag(EEH_PROBE_MODE_DEV))
364 /* Find the PHB PE */
365 phb_pe = eeh_phb_pe_get(pe->phb);
367 pr_warn("%s Can't find PE for PHB#%d\n",
368 __func__, pe->phb->global_number);
372 /* If the PHB has been in problematic state */
373 eeh_serialize_lock(&flags);
374 if (phb_pe->state & EEH_PE_ISOLATED) {
379 /* Check PHB state */
380 ret = eeh_ops->get_state(phb_pe, NULL);
382 (ret == EEH_STATE_NOT_SUPPORT) ||
383 (ret & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) ==
384 (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) {
389 /* Isolate the PHB and send event */
390 eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
391 eeh_serialize_unlock(flags);
393 pr_err("EEH: PHB#%x failure detected, location: %s\n",
394 phb_pe->phb->global_number, eeh_pe_loc_get(phb_pe));
396 eeh_send_failure_event(phb_pe);
400 eeh_serialize_unlock(flags);
405 * eeh_dev_check_failure - Check if all 1's data is due to EEH slot freeze
408 * Check for an EEH failure for the given device node. Call this
409 * routine if the result of a read was all 0xff's and you want to
410 * find out if this is due to an EEH slot freeze. This routine
411 * will query firmware for the EEH status.
413 * Returns 0 if there has not been an EEH error; otherwise returns
414 * a non-zero value and queues up a slot isolation event notification.
416 * It is safe to call this routine in an interrupt context.
418 int eeh_dev_check_failure(struct eeh_dev *edev)
421 int active_flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
425 struct eeh_pe *pe, *parent_pe, *phb_pe;
427 const char *location = NULL;
429 eeh_stats.total_mmio_ffs++;
438 dev = eeh_dev_to_pci_dev(edev);
439 pe = eeh_dev_to_pe(edev);
441 /* Access to IO BARs might get this far and still not want checking. */
443 eeh_stats.ignored_check++;
444 pr_debug("EEH: Ignored check for %s\n",
449 if (!pe->addr && !pe->config_addr) {
450 eeh_stats.no_cfg_addr++;
455 * On PowerNV platform, we might already have fenced PHB
456 * there and we need take care of that firstly.
458 ret = eeh_phb_check_failure(pe);
463 * If the PE isn't owned by us, we shouldn't check the
464 * state. Instead, let the owner handle it if the PE has
467 if (eeh_pe_passed(pe))
470 /* If we already have a pending isolation event for this
471 * slot, we know it's bad already, we don't need to check.
472 * Do this checking under a lock; as multiple PCI devices
473 * in one slot might report errors simultaneously, and we
474 * only want one error recovery routine running.
476 eeh_serialize_lock(&flags);
478 if (pe->state & EEH_PE_ISOLATED) {
480 if (pe->check_count % EEH_MAX_FAILS == 0) {
481 pdn = eeh_dev_to_pdn(edev);
483 location = of_get_property(pdn->node, "ibm,loc-code", NULL);
484 printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
485 "location=%s driver=%s pci addr=%s\n",
487 location ? location : "unknown",
488 eeh_driver_name(dev), eeh_pci_name(dev));
489 printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
490 eeh_driver_name(dev));
497 * Now test for an EEH failure. This is VERY expensive.
498 * Note that the eeh_config_addr may be a parent device
499 * in the case of a device behind a bridge, or it may be
500 * function zero of a multi-function device.
501 * In any case they must share a common PHB.
503 ret = eeh_ops->get_state(pe, NULL);
505 /* Note that config-io to empty slots may fail;
506 * they are empty when they don't have children.
507 * We will punt with the following conditions: Failure to get
508 * PE's state, EEH not support and Permanently unavailable
509 * state, PE is in good state.
512 (ret == EEH_STATE_NOT_SUPPORT) ||
513 ((ret & active_flags) == active_flags)) {
514 eeh_stats.false_positives++;
515 pe->false_positives++;
521 * It should be corner case that the parent PE has been
522 * put into frozen state as well. We should take care
525 parent_pe = pe->parent;
527 /* Hit the ceiling ? */
528 if (parent_pe->type & EEH_PE_PHB)
531 /* Frozen parent PE ? */
532 ret = eeh_ops->get_state(parent_pe, NULL);
534 (ret & active_flags) != active_flags)
537 /* Next parent level */
538 parent_pe = parent_pe->parent;
541 eeh_stats.slot_resets++;
543 /* Avoid repeated reports of this failure, including problems
544 * with other functions on this device, and functions under
547 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
548 eeh_serialize_unlock(flags);
550 /* Most EEH events are due to device driver bugs. Having
551 * a stack trace will help the device-driver authors figure
552 * out what happened. So print that out.
554 phb_pe = eeh_phb_pe_get(pe->phb);
555 pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
556 pe->phb->global_number, pe->addr);
557 pr_err("EEH: PE location: %s, PHB location: %s\n",
558 eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe));
561 eeh_send_failure_event(pe);
566 eeh_serialize_unlock(flags);
570 EXPORT_SYMBOL_GPL(eeh_dev_check_failure);
573 * eeh_check_failure - Check if all 1's data is due to EEH slot freeze
574 * @token: I/O address
576 * Check for an EEH failure at the given I/O address. Call this
577 * routine if the result of a read was all 0xff's and you want to
578 * find out if this is due to an EEH slot freeze event. This routine
579 * will query firmware for the EEH status.
581 * Note this routine is safe to call in an interrupt context.
583 int eeh_check_failure(const volatile void __iomem *token)
586 struct eeh_dev *edev;
588 /* Finding the phys addr + pci device; this is pretty quick. */
589 addr = eeh_token_to_phys((unsigned long __force) token);
590 edev = eeh_addr_cache_get_dev(addr);
592 eeh_stats.no_device++;
596 return eeh_dev_check_failure(edev);
598 EXPORT_SYMBOL(eeh_check_failure);
602 * eeh_pci_enable - Enable MMIO or DMA transfers for this slot
605 * This routine should be called to reenable frozen MMIO or DMA
606 * so that it would work correctly again. It's useful while doing
607 * recovery or log collection on the indicated device.
609 int eeh_pci_enable(struct eeh_pe *pe, int function)
614 * pHyp doesn't allow to enable IO or DMA on unfrozen PE.
615 * Also, it's pointless to enable them on unfrozen PE. So
616 * we have to check before enabling IO or DMA.
619 case EEH_OPT_THAW_MMIO:
620 active_flag = EEH_STATE_MMIO_ACTIVE;
622 case EEH_OPT_THAW_DMA:
623 active_flag = EEH_STATE_DMA_ACTIVE;
625 case EEH_OPT_DISABLE:
627 case EEH_OPT_FREEZE_PE:
631 pr_warn("%s: Invalid function %d\n",
637 * Check if IO or DMA has been enabled before
641 rc = eeh_ops->get_state(pe, NULL);
645 /* Needn't enable it at all */
646 if (rc == EEH_STATE_NOT_SUPPORT)
649 /* It's already enabled */
650 if (rc & active_flag)
655 /* Issue the request */
656 rc = eeh_ops->set_option(pe, function);
658 pr_warn("%s: Unexpected state change %d on "
659 "PHB#%d-PE#%x, err=%d\n",
660 __func__, function, pe->phb->global_number,
663 /* Check if the request is finished successfully */
665 rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
669 if (rc & active_flag)
678 static void *eeh_disable_and_save_dev_state(void *data, void *userdata)
680 struct eeh_dev *edev = data;
681 struct pci_dev *pdev = eeh_dev_to_pci_dev(edev);
682 struct pci_dev *dev = userdata;
685 * The caller should have disabled and saved the
686 * state for the specified device
688 if (!pdev || pdev == dev)
691 /* Ensure we have D0 power state */
692 pci_set_power_state(pdev, PCI_D0);
694 /* Save device state */
695 pci_save_state(pdev);
698 * Disable device to avoid any DMA traffic and
699 * interrupt from the device
701 pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
706 static void *eeh_restore_dev_state(void *data, void *userdata)
708 struct eeh_dev *edev = data;
709 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
710 struct pci_dev *pdev = eeh_dev_to_pci_dev(edev);
711 struct pci_dev *dev = userdata;
716 /* Apply customization from firmware */
717 if (pdn && eeh_ops->restore_config)
718 eeh_ops->restore_config(pdn);
720 /* The caller should restore state for the specified device */
722 pci_save_state(pdev);
728 * pcibios_set_pcie_slot_reset - Set PCI-E reset state
729 * @dev: pci device struct
730 * @state: reset state to enter
735 int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state)
737 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
738 struct eeh_pe *pe = eeh_dev_to_pe(edev);
741 pr_err("%s: No PE found on PCI device %s\n",
742 __func__, pci_name(dev));
747 case pcie_deassert_reset:
748 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
749 eeh_unfreeze_pe(pe, false);
750 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
751 eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev);
752 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
755 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
756 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
757 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
758 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
759 eeh_ops->reset(pe, EEH_RESET_HOT);
761 case pcie_warm_reset:
762 eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
763 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
764 eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
765 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
766 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
769 eeh_pe_state_clear(pe, EEH_PE_ISOLATED | EEH_PE_CFG_BLOCKED);
777 * eeh_set_pe_freset - Check the required reset for the indicated device
779 * @flag: return value
781 * Each device might have its preferred reset type: fundamental or
782 * hot reset. The routine is used to collected the information for
783 * the indicated device and its children so that the bunch of the
784 * devices could be reset properly.
786 static void *eeh_set_dev_freset(void *data, void *flag)
789 unsigned int *freset = (unsigned int *)flag;
790 struct eeh_dev *edev = (struct eeh_dev *)data;
792 dev = eeh_dev_to_pci_dev(edev);
794 *freset |= dev->needs_freset;
800 * eeh_reset_pe_once - Assert the pci #RST line for 1/4 second
803 * Assert the PCI #RST line for 1/4 second.
805 static void eeh_reset_pe_once(struct eeh_pe *pe)
807 unsigned int freset = 0;
809 /* Determine type of EEH reset required for
810 * Partitionable Endpoint, a hot-reset (1)
811 * or a fundamental reset (3).
812 * A fundamental reset required by any device under
813 * Partitionable Endpoint trumps hot-reset.
815 eeh_pe_dev_traverse(pe, eeh_set_dev_freset, &freset);
818 eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
820 eeh_ops->reset(pe, EEH_RESET_HOT);
822 eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
826 * eeh_reset_pe - Reset the indicated PE
829 * This routine should be called to reset indicated device, including
830 * PE. A PE might include multiple PCI devices and sometimes PCI bridges
831 * might be involved as well.
833 int eeh_reset_pe(struct eeh_pe *pe)
835 int flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
838 /* Mark as reset and block config space */
839 eeh_pe_state_mark(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED);
841 /* Take three shots at resetting the bus */
842 for (i = 0; i < 3; i++) {
843 eeh_reset_pe_once(pe);
846 * EEH_PE_ISOLATED is expected to be removed after
849 state = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
850 if ((state & flags) == flags) {
856 pr_warn("%s: Unrecoverable slot failure on PHB#%d-PE#%x",
857 __func__, pe->phb->global_number, pe->addr);
858 ret = -ENOTRECOVERABLE;
862 /* We might run out of credits */
864 pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n",
865 __func__, state, pe->phb->global_number, pe->addr, (i + 1));
869 eeh_pe_state_clear(pe, EEH_PE_RESET | EEH_PE_CFG_BLOCKED);
874 * eeh_save_bars - Save device bars
875 * @edev: PCI device associated EEH device
877 * Save the values of the device bars. Unlike the restore
878 * routine, this routine is *not* recursive. This is because
879 * PCI devices are added individually; but, for the restore,
880 * an entire slot is reset at a time.
882 void eeh_save_bars(struct eeh_dev *edev)
887 pdn = eeh_dev_to_pdn(edev);
891 for (i = 0; i < 16; i++)
892 eeh_ops->read_config(pdn, i * 4, 4, &edev->config_space[i]);
895 * For PCI bridges including root port, we need enable bus
896 * master explicitly. Otherwise, it can't fetch IODA table
897 * entries correctly. So we cache the bit in advance so that
898 * we can restore it after reset, either PHB range or PE range.
900 if (edev->mode & EEH_DEV_BRIDGE)
901 edev->config_space[1] |= PCI_COMMAND_MASTER;
905 * eeh_ops_register - Register platform dependent EEH operations
906 * @ops: platform dependent EEH operations
908 * Register the platform dependent EEH operation callback
909 * functions. The platform should call this function before
910 * any other EEH operations.
912 int __init eeh_ops_register(struct eeh_ops *ops)
915 pr_warn("%s: Invalid EEH ops name for %p\n",
920 if (eeh_ops && eeh_ops != ops) {
921 pr_warn("%s: EEH ops of platform %s already existing (%s)\n",
922 __func__, eeh_ops->name, ops->name);
932 * eeh_ops_unregister - Unreigster platform dependent EEH operations
933 * @name: name of EEH platform operations
935 * Unregister the platform dependent EEH operation callback
938 int __exit eeh_ops_unregister(const char *name)
940 if (!name || !strlen(name)) {
941 pr_warn("%s: Invalid EEH ops name\n",
946 if (eeh_ops && !strcmp(eeh_ops->name, name)) {
954 static int eeh_reboot_notifier(struct notifier_block *nb,
955 unsigned long action, void *unused)
957 eeh_clear_flag(EEH_ENABLED);
961 static struct notifier_block eeh_reboot_nb = {
962 .notifier_call = eeh_reboot_notifier,
966 * eeh_init - EEH initialization
968 * Initialize EEH by trying to enable it for all of the adapters in the system.
969 * As a side effect we can determine here if eeh is supported at all.
970 * Note that we leave EEH on so failed config cycles won't cause a machine
971 * check. If a user turns off EEH for a particular adapter they are really
972 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
973 * grant access to a slot if EEH isn't enabled, and so we always enable
974 * EEH for all slots/all devices.
976 * The eeh-force-off option disables EEH checking globally, for all slots.
977 * Even if force-off is set, the EEH hardware is still enabled, so that
978 * newer systems can boot.
982 struct pci_controller *hose, *tmp;
988 * We have to delay the initialization on PowerNV after
989 * the PCI hierarchy tree has been built because the PEs
990 * are figured out based on PCI devices instead of device
993 if (machine_is(powernv) && cnt++ <= 0)
996 /* Register reboot notifier */
997 ret = register_reboot_notifier(&eeh_reboot_nb);
999 pr_warn("%s: Failed to register notifier (%d)\n",
1004 /* call platform initialization function */
1006 pr_warn("%s: Platform EEH operation not found\n",
1009 } else if ((ret = eeh_ops->init()))
1012 /* Initialize EEH event */
1013 ret = eeh_event_init();
1017 /* Enable EEH for all adapters */
1018 list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
1019 pdn = hose->pci_data;
1020 traverse_pci_dn(pdn, eeh_ops->probe, NULL);
1024 * Call platform post-initialization. Actually, It's good chance
1025 * to inform platform that EEH is ready to supply service if the
1026 * I/O cache stuff has been built up.
1028 if (eeh_ops->post_init) {
1029 ret = eeh_ops->post_init();
1035 pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
1037 pr_warn("EEH: No capable adapters found\n");
1042 core_initcall_sync(eeh_init);
1045 * eeh_add_device_early - Enable EEH for the indicated device node
1046 * @pdn: PCI device node for which to set up EEH
1048 * This routine must be used to perform EEH initialization for PCI
1049 * devices that were added after system boot (e.g. hotplug, dlpar).
1050 * This routine must be called before any i/o is performed to the
1051 * adapter (inluding any config-space i/o).
1052 * Whether this actually enables EEH or not for this device depends
1053 * on the CEC architecture, type of the device, on earlier boot
1054 * command-line arguments & etc.
1056 void eeh_add_device_early(struct pci_dn *pdn)
1058 struct pci_controller *phb;
1059 struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
1061 if (!edev || !eeh_enabled())
1064 if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))
1067 /* USB Bus children of PCI devices will not have BUID's */
1070 (eeh_has_flag(EEH_PROBE_MODE_DEVTREE) && 0 == phb->buid))
1073 eeh_ops->probe(pdn, NULL);
1077 * eeh_add_device_tree_early - Enable EEH for the indicated device
1078 * @pdn: PCI device node
1080 * This routine must be used to perform EEH initialization for the
1081 * indicated PCI device that was added after system boot (e.g.
1084 void eeh_add_device_tree_early(struct pci_dn *pdn)
1091 list_for_each_entry(n, &pdn->child_list, list)
1092 eeh_add_device_tree_early(n);
1093 eeh_add_device_early(pdn);
1095 EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
1098 * eeh_add_device_late - Perform EEH initialization for the indicated pci device
1099 * @dev: pci device for which to set up EEH
1101 * This routine must be used to complete EEH initialization for PCI
1102 * devices that were added after system boot (e.g. hotplug, dlpar).
1104 void eeh_add_device_late(struct pci_dev *dev)
1107 struct eeh_dev *edev;
1109 if (!dev || !eeh_enabled())
1112 pr_debug("EEH: Adding device %s\n", pci_name(dev));
1114 pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
1115 edev = pdn_to_eeh_dev(pdn);
1116 if (edev->pdev == dev) {
1117 pr_debug("EEH: Already referenced !\n");
1121 if (eeh_has_flag(EEH_PROBE_MODE_DEV))
1122 eeh_ops->probe(pdn, NULL);
1125 * The EEH cache might not be removed correctly because of
1126 * unbalanced kref to the device during unplug time, which
1127 * relies on pcibios_release_device(). So we have to remove
1128 * that here explicitly.
1131 eeh_rmv_from_parent_pe(edev);
1132 eeh_addr_cache_rmv_dev(edev->pdev);
1133 eeh_sysfs_remove_device(edev->pdev);
1134 edev->mode &= ~EEH_DEV_SYSFS;
1137 * We definitely should have the PCI device removed
1138 * though it wasn't correctly. So we needn't call
1139 * into error handler afterwards.
1141 edev->mode |= EEH_DEV_NO_HANDLER;
1144 dev->dev.archdata.edev = NULL;
1148 dev->dev.archdata.edev = edev;
1150 eeh_addr_cache_insert_dev(dev);
1154 * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1157 * This routine must be used to perform EEH initialization for PCI
1158 * devices which are attached to the indicated PCI bus. The PCI bus
1159 * is added after system boot through hotplug or dlpar.
1161 void eeh_add_device_tree_late(struct pci_bus *bus)
1163 struct pci_dev *dev;
1165 list_for_each_entry(dev, &bus->devices, bus_list) {
1166 eeh_add_device_late(dev);
1167 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1168 struct pci_bus *subbus = dev->subordinate;
1170 eeh_add_device_tree_late(subbus);
1174 EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1177 * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1180 * This routine must be used to add EEH sysfs files for PCI
1181 * devices which are attached to the indicated PCI bus. The PCI bus
1182 * is added after system boot through hotplug or dlpar.
1184 void eeh_add_sysfs_files(struct pci_bus *bus)
1186 struct pci_dev *dev;
1188 list_for_each_entry(dev, &bus->devices, bus_list) {
1189 eeh_sysfs_add_device(dev);
1190 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1191 struct pci_bus *subbus = dev->subordinate;
1193 eeh_add_sysfs_files(subbus);
1197 EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1200 * eeh_remove_device - Undo EEH setup for the indicated pci device
1201 * @dev: pci device to be removed
1203 * This routine should be called when a device is removed from
1204 * a running system (e.g. by hotplug or dlpar). It unregisters
1205 * the PCI device from the EEH subsystem. I/O errors affecting
1206 * this device will no longer be detected after this call; thus,
1207 * i/o errors affecting this slot may leave this device unusable.
1209 void eeh_remove_device(struct pci_dev *dev)
1211 struct eeh_dev *edev;
1213 if (!dev || !eeh_enabled())
1215 edev = pci_dev_to_eeh_dev(dev);
1217 /* Unregister the device with the EEH/PCI address search system */
1218 pr_debug("EEH: Removing device %s\n", pci_name(dev));
1220 if (!edev || !edev->pdev || !edev->pe) {
1221 pr_debug("EEH: Not referenced !\n");
1226 * During the hotplug for EEH error recovery, we need the EEH
1227 * device attached to the parent PE in order for BAR restore
1228 * a bit later. So we keep it for BAR restore and remove it
1229 * from the parent PE during the BAR resotre.
1232 dev->dev.archdata.edev = NULL;
1233 if (!(edev->pe->state & EEH_PE_KEEP))
1234 eeh_rmv_from_parent_pe(edev);
1236 edev->mode |= EEH_DEV_DISCONNECTED;
1239 * We're removing from the PCI subsystem, that means
1240 * the PCI device driver can't support EEH or not
1241 * well. So we rely on hotplug completely to do recovery
1242 * for the specific PCI device.
1244 edev->mode |= EEH_DEV_NO_HANDLER;
1246 eeh_addr_cache_rmv_dev(dev);
1247 eeh_sysfs_remove_device(dev);
1248 edev->mode &= ~EEH_DEV_SYSFS;
1251 int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state)
1255 ret = eeh_pci_enable(pe, EEH_OPT_THAW_MMIO);
1257 pr_warn("%s: Failure %d enabling IO on PHB#%x-PE#%x\n",
1258 __func__, ret, pe->phb->global_number, pe->addr);
1262 ret = eeh_pci_enable(pe, EEH_OPT_THAW_DMA);
1264 pr_warn("%s: Failure %d enabling DMA on PHB#%x-PE#%x\n",
1265 __func__, ret, pe->phb->global_number, pe->addr);
1269 /* Clear software isolated state */
1270 if (sw_state && (pe->state & EEH_PE_ISOLATED))
1271 eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
1277 static struct pci_device_id eeh_reset_ids[] = {
1278 { PCI_DEVICE(0x19a2, 0x0710) }, /* Emulex, BE */
1279 { PCI_DEVICE(0x10df, 0xe220) }, /* Emulex, Lancer */
1280 { PCI_DEVICE(0x14e4, 0x1657) }, /* Broadcom BCM5719 */
1284 static int eeh_pe_change_owner(struct eeh_pe *pe)
1286 struct eeh_dev *edev, *tmp;
1287 struct pci_dev *pdev;
1288 struct pci_device_id *id;
1291 /* Check PE state */
1292 flags = (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE);
1293 ret = eeh_ops->get_state(pe, NULL);
1294 if (ret < 0 || ret == EEH_STATE_NOT_SUPPORT)
1297 /* Unfrozen PE, nothing to do */
1298 if ((ret & flags) == flags)
1301 /* Frozen PE, check if it needs PE level reset */
1302 eeh_pe_for_each_dev(pe, edev, tmp) {
1303 pdev = eeh_dev_to_pci_dev(edev);
1307 for (id = &eeh_reset_ids[0]; id->vendor != 0; id++) {
1308 if (id->vendor != PCI_ANY_ID &&
1309 id->vendor != pdev->vendor)
1311 if (id->device != PCI_ANY_ID &&
1312 id->device != pdev->device)
1314 if (id->subvendor != PCI_ANY_ID &&
1315 id->subvendor != pdev->subsystem_vendor)
1317 if (id->subdevice != PCI_ANY_ID &&
1318 id->subdevice != pdev->subsystem_device)
1325 return eeh_unfreeze_pe(pe, true);
1328 return eeh_pe_reset_and_recover(pe);
1332 * eeh_dev_open - Increase count of pass through devices for PE
1335 * Increase count of passed through devices for the indicated
1336 * PE. In the result, the EEH errors detected on the PE won't be
1337 * reported. The PE owner will be responsible for detection
1340 int eeh_dev_open(struct pci_dev *pdev)
1342 struct eeh_dev *edev;
1345 mutex_lock(&eeh_dev_mutex);
1347 /* No PCI device ? */
1351 /* No EEH device or PE ? */
1352 edev = pci_dev_to_eeh_dev(pdev);
1353 if (!edev || !edev->pe)
1357 * The PE might have been put into frozen state, but we
1358 * didn't detect that yet. The passed through PCI devices
1359 * in frozen PE won't work properly. Clear the frozen state
1362 ret = eeh_pe_change_owner(edev->pe);
1366 /* Increase PE's pass through count */
1367 atomic_inc(&edev->pe->pass_dev_cnt);
1368 mutex_unlock(&eeh_dev_mutex);
1372 mutex_unlock(&eeh_dev_mutex);
1375 EXPORT_SYMBOL_GPL(eeh_dev_open);
1378 * eeh_dev_release - Decrease count of pass through devices for PE
1381 * Decrease count of pass through devices for the indicated PE. If
1382 * there is no passed through device in PE, the EEH errors detected
1383 * on the PE will be reported and handled as usual.
1385 void eeh_dev_release(struct pci_dev *pdev)
1387 struct eeh_dev *edev;
1389 mutex_lock(&eeh_dev_mutex);
1391 /* No PCI device ? */
1395 /* No EEH device ? */
1396 edev = pci_dev_to_eeh_dev(pdev);
1397 if (!edev || !edev->pe || !eeh_pe_passed(edev->pe))
1400 /* Decrease PE's pass through count */
1401 atomic_dec(&edev->pe->pass_dev_cnt);
1402 WARN_ON(atomic_read(&edev->pe->pass_dev_cnt) < 0);
1403 eeh_pe_change_owner(edev->pe);
1405 mutex_unlock(&eeh_dev_mutex);
1407 EXPORT_SYMBOL(eeh_dev_release);
1409 #ifdef CONFIG_IOMMU_API
1411 static int dev_has_iommu_table(struct device *dev, void *data)
1413 struct pci_dev *pdev = to_pci_dev(dev);
1414 struct pci_dev **ppdev = data;
1415 struct iommu_table *tbl;
1420 tbl = get_iommu_table_base(dev);
1421 if (tbl && tbl->it_group) {
1430 * eeh_iommu_group_to_pe - Convert IOMMU group to EEH PE
1431 * @group: IOMMU group
1433 * The routine is called to convert IOMMU group to EEH PE.
1435 struct eeh_pe *eeh_iommu_group_to_pe(struct iommu_group *group)
1437 struct pci_dev *pdev = NULL;
1438 struct eeh_dev *edev;
1441 /* No IOMMU group ? */
1445 ret = iommu_group_for_each_dev(group, &pdev, dev_has_iommu_table);
1449 /* No EEH device or PE ? */
1450 edev = pci_dev_to_eeh_dev(pdev);
1451 if (!edev || !edev->pe)
1456 EXPORT_SYMBOL_GPL(eeh_iommu_group_to_pe);
1458 #endif /* CONFIG_IOMMU_API */
1461 * eeh_pe_set_option - Set options for the indicated PE
1463 * @option: requested option
1465 * The routine is called to enable or disable EEH functionality
1466 * on the indicated PE, to enable IO or DMA for the frozen PE.
1468 int eeh_pe_set_option(struct eeh_pe *pe, int option)
1477 * EEH functionality could possibly be disabled, just
1478 * return error for the case. And the EEH functinality
1479 * isn't expected to be disabled on one specific PE.
1482 case EEH_OPT_ENABLE:
1483 if (eeh_enabled()) {
1484 ret = eeh_pe_change_owner(pe);
1489 case EEH_OPT_DISABLE:
1491 case EEH_OPT_THAW_MMIO:
1492 case EEH_OPT_THAW_DMA:
1493 if (!eeh_ops || !eeh_ops->set_option) {
1498 ret = eeh_pci_enable(pe, option);
1501 pr_debug("%s: Option %d out of range (%d, %d)\n",
1502 __func__, option, EEH_OPT_DISABLE, EEH_OPT_THAW_DMA);
1508 EXPORT_SYMBOL_GPL(eeh_pe_set_option);
1511 * eeh_pe_get_state - Retrieve PE's state
1514 * Retrieve the PE's state, which includes 3 aspects: enabled
1515 * DMA, enabled IO and asserted reset.
1517 int eeh_pe_get_state(struct eeh_pe *pe)
1519 int result, ret = 0;
1520 bool rst_active, dma_en, mmio_en;
1526 if (!eeh_ops || !eeh_ops->get_state)
1529 result = eeh_ops->get_state(pe, NULL);
1530 rst_active = !!(result & EEH_STATE_RESET_ACTIVE);
1531 dma_en = !!(result & EEH_STATE_DMA_ENABLED);
1532 mmio_en = !!(result & EEH_STATE_MMIO_ENABLED);
1535 ret = EEH_PE_STATE_RESET;
1536 else if (dma_en && mmio_en)
1537 ret = EEH_PE_STATE_NORMAL;
1538 else if (!dma_en && !mmio_en)
1539 ret = EEH_PE_STATE_STOPPED_IO_DMA;
1540 else if (!dma_en && mmio_en)
1541 ret = EEH_PE_STATE_STOPPED_DMA;
1543 ret = EEH_PE_STATE_UNAVAIL;
1547 EXPORT_SYMBOL_GPL(eeh_pe_get_state);
1549 static int eeh_pe_reenable_devices(struct eeh_pe *pe)
1551 struct eeh_dev *edev, *tmp;
1552 struct pci_dev *pdev;
1555 /* Restore config space */
1556 eeh_pe_restore_bars(pe);
1559 * Reenable PCI devices as the devices passed
1560 * through are always enabled before the reset.
1562 eeh_pe_for_each_dev(pe, edev, tmp) {
1563 pdev = eeh_dev_to_pci_dev(edev);
1567 ret = pci_reenable_device(pdev);
1569 pr_warn("%s: Failure %d reenabling %s\n",
1570 __func__, ret, pci_name(pdev));
1575 /* The PE is still in frozen state */
1576 return eeh_unfreeze_pe(pe, true);
1580 * eeh_pe_reset - Issue PE reset according to specified type
1582 * @option: reset type
1584 * The routine is called to reset the specified PE with the
1585 * indicated type, either fundamental reset or hot reset.
1586 * PE reset is the most important part for error recovery.
1588 int eeh_pe_reset(struct eeh_pe *pe, int option)
1596 if (!eeh_ops || !eeh_ops->set_option || !eeh_ops->reset)
1600 case EEH_RESET_DEACTIVATE:
1601 ret = eeh_ops->reset(pe, option);
1602 eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
1606 ret = eeh_pe_reenable_devices(pe);
1609 case EEH_RESET_FUNDAMENTAL:
1611 * Proactively freeze the PE to drop all MMIO access
1612 * during reset, which should be banned as it's always
1613 * cause recursive EEH error.
1615 eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
1617 eeh_pe_state_mark(pe, EEH_PE_CFG_BLOCKED);
1618 ret = eeh_ops->reset(pe, option);
1621 pr_debug("%s: Unsupported option %d\n",
1628 EXPORT_SYMBOL_GPL(eeh_pe_reset);
1631 * eeh_pe_configure - Configure PCI bridges after PE reset
1634 * The routine is called to restore the PCI config space for
1635 * those PCI devices, especially PCI bridges affected by PE
1636 * reset issued previously.
1638 int eeh_pe_configure(struct eeh_pe *pe)
1648 EXPORT_SYMBOL_GPL(eeh_pe_configure);
1650 static int proc_eeh_show(struct seq_file *m, void *v)
1652 if (!eeh_enabled()) {
1653 seq_printf(m, "EEH Subsystem is globally disabled\n");
1654 seq_printf(m, "eeh_total_mmio_ffs=%llu\n", eeh_stats.total_mmio_ffs);
1656 seq_printf(m, "EEH Subsystem is enabled\n");
1659 "no device node=%llu\n"
1660 "no config address=%llu\n"
1661 "check not wanted=%llu\n"
1662 "eeh_total_mmio_ffs=%llu\n"
1663 "eeh_false_positives=%llu\n"
1664 "eeh_slot_resets=%llu\n",
1665 eeh_stats.no_device,
1667 eeh_stats.no_cfg_addr,
1668 eeh_stats.ignored_check,
1669 eeh_stats.total_mmio_ffs,
1670 eeh_stats.false_positives,
1671 eeh_stats.slot_resets);
1677 static int proc_eeh_open(struct inode *inode, struct file *file)
1679 return single_open(file, proc_eeh_show, NULL);
1682 static const struct file_operations proc_eeh_operations = {
1683 .open = proc_eeh_open,
1685 .llseek = seq_lseek,
1686 .release = single_release,
1689 #ifdef CONFIG_DEBUG_FS
1690 static int eeh_enable_dbgfs_set(void *data, u64 val)
1693 eeh_clear_flag(EEH_FORCE_DISABLED);
1695 eeh_add_flag(EEH_FORCE_DISABLED);
1697 /* Notify the backend */
1698 if (eeh_ops->post_init)
1699 eeh_ops->post_init();
1704 static int eeh_enable_dbgfs_get(void *data, u64 *val)
1713 static int eeh_freeze_dbgfs_set(void *data, u64 val)
1715 eeh_max_freezes = val;
1719 static int eeh_freeze_dbgfs_get(void *data, u64 *val)
1721 *val = eeh_max_freezes;
1725 DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1726 eeh_enable_dbgfs_set, "0x%llx\n");
1727 DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get,
1728 eeh_freeze_dbgfs_set, "0x%llx\n");
1731 static int __init eeh_init_proc(void)
1733 if (machine_is(pseries) || machine_is(powernv)) {
1734 proc_create("powerpc/eeh", 0, NULL, &proc_eeh_operations);
1735 #ifdef CONFIG_DEBUG_FS
1736 debugfs_create_file("eeh_enable", 0600,
1737 powerpc_debugfs_root, NULL,
1738 &eeh_enable_dbgfs_ops);
1739 debugfs_create_file("eeh_max_freezes", 0600,
1740 powerpc_debugfs_root, NULL,
1741 &eeh_freeze_dbgfs_ops);
1747 __initcall(eeh_init_proc);