2 * B4420 Silicon/SoC Device Tree Source (post include)
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36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
43 compatible = "fsl,ifc", "simple-bus";
44 interrupts = <25 2 0 0>;
47 /* controller at 0x200000 */
49 compatible = "fsl,b4-pcie", "fsl,qoriq-pcie-v2.4";
53 bus-range = <0x0 0xff>;
54 interrupts = <20 2 0 0>;
55 fsl,iommu-parent = <&pamu0>;
57 #interrupt-cells = <1>;
62 interrupts = <20 2 0 0>;
63 interrupt-map-mask = <0xf800 0 0 7>;
66 0000 0 0 1 &mpic 40 1 0 0
67 0000 0 0 2 &mpic 1 1 0 0
68 0000 0 0 3 &mpic 2 1 0 0
69 0000 0 0 4 &mpic 3 1 0 0
77 compatible = "fsl,dcsr", "simple-bus";
80 compatible = "fsl,b4-dcsr-epu", "fsl,dcsr-epu";
81 interrupts = <52 2 0 0
89 compatible = "fsl,b4-dcsr-cnpc", "fsl,dcsr-cnpc";
90 reg = <0x1000 0x1000 0x1002000 0x10000>;
93 compatible = "fsl,dcsr-nxc";
94 reg = <0x2000 0x1000>;
97 compatible = "fsl,dcsr-corenet";
98 reg = <0x8000 0x1000 0x1A000 0x1000>;
101 compatible = "fsl,b4-dcsr-dpaa", "fsl,dcsr-dpaa";
102 reg = <0x9000 0x1000>;
105 compatible = "fsl,b4-dcsr-ocn", "fsl,dcsr-ocn";
106 reg = <0x11000 0x1000>;
109 compatible = "fsl,dcsr-ddr";
110 dev-handle = <&ddr1>;
111 reg = <0x12000 0x1000>;
114 compatible = "fsl,b4-dcsr-nal", "fsl,dcsr-nal";
115 reg = <0x18000 0x1000>;
118 compatible = "fsl,b4-dcsr-rcpm", "fsl,dcsr-rcpm";
119 reg = <0x22000 0x1000>;
122 compatible = "fsl,b4-dcsr-snpc", "fsl,dcsr-snpc";
123 reg = <0x30000 0x1000 0x1022000 0x10000>;
126 compatible = "fsl,b4-dcsr-snpc", "fsl,dcsr-snpc";
127 reg = <0x31000 0x1000 0x1042000 0x10000>;
129 dcsr-cpu-sb-proxy@100000 {
130 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
131 cpu-handle = <&cpu0>;
132 reg = <0x100000 0x1000 0x101000 0x1000>;
137 #address-cells = <0x1>;
139 compatible = "simple-bus";
142 compatible = "fsl,bman-portal";
143 reg = <0x0 0x4000>, <0x1000000 0x1000>;
144 interrupts = <105 2 0 0>;
147 compatible = "fsl,bman-portal";
148 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
149 interrupts = <107 2 0 0>;
152 compatible = "fsl,bman-portal";
153 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
154 interrupts = <109 2 0 0>;
157 compatible = "fsl,bman-portal";
158 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
159 interrupts = <111 2 0 0>;
162 compatible = "fsl,bman-portal";
163 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
164 interrupts = <113 2 0 0>;
167 compatible = "fsl,bman-portal";
168 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
169 interrupts = <115 2 0 0>;
172 compatible = "fsl,bman-portal";
173 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
174 interrupts = <117 2 0 0>;
177 compatible = "fsl,bman-portal";
178 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
179 interrupts = <119 2 0 0>;
182 compatible = "fsl,bman-portal";
183 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
184 interrupts = <121 2 0 0>;
187 compatible = "fsl,bman-portal";
188 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
189 interrupts = <123 2 0 0>;
192 compatible = "fsl,bman-portal";
193 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
194 interrupts = <125 2 0 0>;
197 compatible = "fsl,bman-portal";
198 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
199 interrupts = <127 2 0 0>;
202 compatible = "fsl,bman-portal";
203 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
204 interrupts = <129 2 0 0>;
207 compatible = "fsl,bman-portal";
208 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
209 interrupts = <131 2 0 0>;
214 #address-cells = <1>;
217 compatible = "simple-bus";
220 compatible = "fsl,soc-sram-error";
221 interrupts = <16 2 1 2>;
225 compatible = "fsl,corenet-law";
230 ddr1: memory-controller@8000 {
231 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
232 reg = <0x8000 0x1000>;
233 interrupts = <16 2 1 8>;
236 cpc: l3-cache-controller@10000 {
237 compatible = "fsl,b4-l3-cache-controller", "cache";
238 reg = <0x10000 0x1000>;
239 interrupts = <16 2 1 4>;
243 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
244 reg = <0x18000 0x1000>;
245 interrupts = <16 2 1 0>;
246 fsl,ccf-num-csdids = <32>;
247 fsl,ccf-num-snoopids = <32>;
251 compatible = "fsl,pamu-v1.0", "fsl,pamu";
252 reg = <0x20000 0x4000>;
253 fsl,portid-mapping = <0x8000>;
254 #address-cells = <1>;
261 /* PCIe, DMA, SRIO */
264 fsl,primary-cache-geometry = <8 1>;
265 fsl,secondary-cache-geometry = <32 2>;
270 reg = <0x1000 0x1000>;
271 fsl,primary-cache-geometry = <32 1>;
272 fsl,secondary-cache-geometry = <32 2>;
277 reg = <0x2000 0x1000>;
278 fsl,primary-cache-geometry = <32 1>;
279 fsl,secondary-cache-geometry = <32 2>;
284 reg = <0x3000 0x1000>;
285 fsl,primary-cache-geometry = <32 1>;
286 fsl,secondary-cache-geometry = <32 2>;
290 /include/ "qoriq-mpic4.3.dtsi"
292 guts: global-utilities@e0000 {
293 compatible = "fsl,b4-device-config";
294 reg = <0xe0000 0xe00>;
296 fsl,liodn-bits = <12>;
299 clockgen: global-utilities@e1000 {
300 compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
301 reg = <0xe1000 0x1000>;
304 rcpm: global-utilities@e2000 {
305 compatible = "fsl,b4-rcpm", "fsl,qoriq-rcpm-2.0";
306 reg = <0xe2000 0x1000>;
309 /include/ "elo3-dma-0.dtsi"
311 fsl,iommu-parent = <&pamu0>;
312 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
315 /include/ "elo3-dma-1.dtsi"
317 fsl,iommu-parent = <&pamu0>;
318 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
321 /include/ "qonverge-usb2-dr-0.dtsi"
323 compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
324 fsl,iommu-parent = <&pamu1>;
325 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
328 /include/ "qoriq-espi-0.dtsi"
330 fsl,espi-num-chipselects = <4>;
333 /include/ "qoriq-esdhc-0.dtsi"
336 fsl,iommu-parent = <&pamu1>;
337 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
340 /include/ "qoriq-i2c-0.dtsi"
341 /include/ "qoriq-i2c-1.dtsi"
342 /include/ "qoriq-duart-0.dtsi"
343 /include/ "qoriq-duart-1.dtsi"
344 /include/ "qoriq-sec5.3-0.dtsi"
346 /include/ "qoriq-bman1.dtsi"
348 interrupts = <16 2 1 29>;
351 L2: l2-cache-controller@c20000 {
352 compatible = "fsl,b4-l2-cache-controller";
353 reg = <0xc20000 0x1000>;
354 next-level-cache = <&cpc>;