2 * Based on arch/arm/kernel/ptrace.c
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 * Copyright (C) 2012 ARM Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/audit.h>
23 #include <linux/compat.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
27 #include <linux/smp.h>
28 #include <linux/ptrace.h>
29 #include <linux/user.h>
30 #include <linux/seccomp.h>
31 #include <linux/security.h>
32 #include <linux/init.h>
33 #include <linux/signal.h>
34 #include <linux/uaccess.h>
35 #include <linux/perf_event.h>
36 #include <linux/hw_breakpoint.h>
37 #include <linux/regset.h>
38 #include <linux/tracehook.h>
39 #include <linux/elf.h>
41 #include <asm/compat.h>
42 #include <asm/cpufeature.h>
43 #include <asm/debug-monitors.h>
44 #include <asm/pgtable.h>
45 #include <asm/syscall.h>
46 #include <asm/traps.h>
47 #include <asm/system_misc.h>
49 #define CREATE_TRACE_POINTS
50 #include <trace/events/syscalls.h>
53 * TODO: does not yet catch signals sent when the child dies.
54 * in exit.c or in signal.c.
58 * Called by kernel/ptrace.c when detaching..
60 void ptrace_disable(struct task_struct *child)
63 * This would be better off in core code, but PTRACE_DETACH has
64 * grown its fair share of arch-specific worts and changing it
65 * is likely to cause regressions on obscure architectures.
67 user_disable_single_step(child);
70 #ifdef CONFIG_HAVE_HW_BREAKPOINT
72 * Handle hitting a HW-breakpoint.
74 static void ptrace_hbptriggered(struct perf_event *bp,
75 struct perf_sample_data *data,
78 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
82 .si_code = TRAP_HWBKPT,
83 .si_addr = (void __user *)(bkpt->trigger),
89 if (!is_compat_task())
92 for (i = 0; i < ARM_MAX_BRP; ++i) {
93 if (current->thread.debug.hbp_break[i] == bp) {
94 info.si_errno = (i << 1) + 1;
99 for (i = 0; i < ARM_MAX_WRP; ++i) {
100 if (current->thread.debug.hbp_watch[i] == bp) {
101 info.si_errno = -((i << 1) + 1);
108 force_sig_info(SIGTRAP, &info, current);
112 * Unregister breakpoints from this task and reset the pointers in
115 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
118 struct thread_struct *t = &tsk->thread;
120 for (i = 0; i < ARM_MAX_BRP; i++) {
121 if (t->debug.hbp_break[i]) {
122 unregister_hw_breakpoint(t->debug.hbp_break[i]);
123 t->debug.hbp_break[i] = NULL;
127 for (i = 0; i < ARM_MAX_WRP; i++) {
128 if (t->debug.hbp_watch[i]) {
129 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
130 t->debug.hbp_watch[i] = NULL;
135 void ptrace_hw_copy_thread(struct task_struct *tsk)
137 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
140 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
141 struct task_struct *tsk,
144 struct perf_event *bp = ERR_PTR(-EINVAL);
147 case NT_ARM_HW_BREAK:
148 if (idx < ARM_MAX_BRP)
149 bp = tsk->thread.debug.hbp_break[idx];
151 case NT_ARM_HW_WATCH:
152 if (idx < ARM_MAX_WRP)
153 bp = tsk->thread.debug.hbp_watch[idx];
160 static int ptrace_hbp_set_event(unsigned int note_type,
161 struct task_struct *tsk,
163 struct perf_event *bp)
168 case NT_ARM_HW_BREAK:
169 if (idx < ARM_MAX_BRP) {
170 tsk->thread.debug.hbp_break[idx] = bp;
174 case NT_ARM_HW_WATCH:
175 if (idx < ARM_MAX_WRP) {
176 tsk->thread.debug.hbp_watch[idx] = bp;
185 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
186 struct task_struct *tsk,
189 struct perf_event *bp;
190 struct perf_event_attr attr;
194 case NT_ARM_HW_BREAK:
195 type = HW_BREAKPOINT_X;
197 case NT_ARM_HW_WATCH:
198 type = HW_BREAKPOINT_RW;
201 return ERR_PTR(-EINVAL);
204 ptrace_breakpoint_init(&attr);
207 * Initialise fields to sane defaults
208 * (i.e. values that will pass validation).
211 attr.bp_len = HW_BREAKPOINT_LEN_4;
215 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
219 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
226 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
227 struct arch_hw_breakpoint_ctrl ctrl,
228 struct perf_event_attr *attr)
230 int err, len, type, disabled = !ctrl.enabled;
232 attr->disabled = disabled;
236 err = arch_bp_generic_fields(ctrl, &len, &type);
241 case NT_ARM_HW_BREAK:
242 if ((type & HW_BREAKPOINT_X) != type)
245 case NT_ARM_HW_WATCH:
246 if ((type & HW_BREAKPOINT_RW) != type)
254 attr->bp_type = type;
259 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
265 case NT_ARM_HW_BREAK:
266 num = hw_breakpoint_slots(TYPE_INST);
268 case NT_ARM_HW_WATCH:
269 num = hw_breakpoint_slots(TYPE_DATA);
275 reg |= debug_monitors_arch();
283 static int ptrace_hbp_get_ctrl(unsigned int note_type,
284 struct task_struct *tsk,
288 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
293 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
297 static int ptrace_hbp_get_addr(unsigned int note_type,
298 struct task_struct *tsk,
302 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
307 *addr = bp ? bp->attr.bp_addr : 0;
311 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
312 struct task_struct *tsk,
315 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
318 bp = ptrace_hbp_create(note_type, tsk, idx);
323 static int ptrace_hbp_set_ctrl(unsigned int note_type,
324 struct task_struct *tsk,
329 struct perf_event *bp;
330 struct perf_event_attr attr;
331 struct arch_hw_breakpoint_ctrl ctrl;
333 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
340 decode_ctrl_reg(uctrl, &ctrl);
341 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
345 return modify_user_hw_breakpoint(bp, &attr);
348 static int ptrace_hbp_set_addr(unsigned int note_type,
349 struct task_struct *tsk,
354 struct perf_event *bp;
355 struct perf_event_attr attr;
357 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
365 err = modify_user_hw_breakpoint(bp, &attr);
369 #define PTRACE_HBP_ADDR_SZ sizeof(u64)
370 #define PTRACE_HBP_CTRL_SZ sizeof(u32)
371 #define PTRACE_HBP_PAD_SZ sizeof(u32)
373 static int hw_break_get(struct task_struct *target,
374 const struct user_regset *regset,
375 unsigned int pos, unsigned int count,
376 void *kbuf, void __user *ubuf)
378 unsigned int note_type = regset->core_note_type;
379 int ret, idx = 0, offset, limit;
384 ret = ptrace_hbp_get_resource_info(note_type, &info);
388 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
394 offset = offsetof(struct user_hwdebug_state, pad);
395 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
396 offset + PTRACE_HBP_PAD_SZ);
400 /* (address, ctrl) registers */
401 offset = offsetof(struct user_hwdebug_state, dbg_regs);
402 limit = regset->n * regset->size;
403 while (count && offset < limit) {
404 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
407 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
408 offset, offset + PTRACE_HBP_ADDR_SZ);
411 offset += PTRACE_HBP_ADDR_SZ;
413 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
416 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
417 offset, offset + PTRACE_HBP_CTRL_SZ);
420 offset += PTRACE_HBP_CTRL_SZ;
422 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
424 offset + PTRACE_HBP_PAD_SZ);
427 offset += PTRACE_HBP_PAD_SZ;
434 static int hw_break_set(struct task_struct *target,
435 const struct user_regset *regset,
436 unsigned int pos, unsigned int count,
437 const void *kbuf, const void __user *ubuf)
439 unsigned int note_type = regset->core_note_type;
440 int ret, idx = 0, offset, limit;
444 /* Resource info and pad */
445 offset = offsetof(struct user_hwdebug_state, dbg_regs);
446 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
450 /* (address, ctrl) registers */
451 limit = regset->n * regset->size;
452 while (count && offset < limit) {
453 if (count < PTRACE_HBP_ADDR_SZ)
455 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
456 offset, offset + PTRACE_HBP_ADDR_SZ);
459 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
462 offset += PTRACE_HBP_ADDR_SZ;
466 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
467 offset, offset + PTRACE_HBP_CTRL_SZ);
470 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
473 offset += PTRACE_HBP_CTRL_SZ;
475 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
477 offset + PTRACE_HBP_PAD_SZ);
480 offset += PTRACE_HBP_PAD_SZ;
486 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
488 static int gpr_get(struct task_struct *target,
489 const struct user_regset *regset,
490 unsigned int pos, unsigned int count,
491 void *kbuf, void __user *ubuf)
493 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
494 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
497 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
498 unsigned int pos, unsigned int count,
499 const void *kbuf, const void __user *ubuf)
502 struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
504 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
508 if (!valid_user_regs(&newregs, target))
511 task_pt_regs(target)->user_regs = newregs;
516 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
518 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
519 unsigned int pos, unsigned int count,
520 void *kbuf, void __user *ubuf)
522 struct user_fpsimd_state *uregs;
523 uregs = &target->thread.fpsimd_state.user_fpsimd;
524 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
527 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
528 unsigned int pos, unsigned int count,
529 const void *kbuf, const void __user *ubuf)
532 struct user_fpsimd_state newstate =
533 target->thread.fpsimd_state.user_fpsimd;
535 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
539 target->thread.fpsimd_state.user_fpsimd = newstate;
540 fpsimd_flush_task_state(target);
544 static int tls_get(struct task_struct *target, const struct user_regset *regset,
545 unsigned int pos, unsigned int count,
546 void *kbuf, void __user *ubuf)
548 unsigned long *tls = &target->thread.tp_value;
549 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
552 static int tls_set(struct task_struct *target, const struct user_regset *regset,
553 unsigned int pos, unsigned int count,
554 const void *kbuf, const void __user *ubuf)
557 unsigned long tls = target->thread.tp_value;
559 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
563 target->thread.tp_value = tls;
567 static int system_call_get(struct task_struct *target,
568 const struct user_regset *regset,
569 unsigned int pos, unsigned int count,
570 void *kbuf, void __user *ubuf)
572 int syscallno = task_pt_regs(target)->syscallno;
574 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
578 static int system_call_set(struct task_struct *target,
579 const struct user_regset *regset,
580 unsigned int pos, unsigned int count,
581 const void *kbuf, const void __user *ubuf)
583 int syscallno = task_pt_regs(target)->syscallno;
586 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
590 task_pt_regs(target)->syscallno = syscallno;
594 enum aarch64_regset {
598 #ifdef CONFIG_HAVE_HW_BREAKPOINT
605 static const struct user_regset aarch64_regsets[] = {
607 .core_note_type = NT_PRSTATUS,
608 .n = sizeof(struct user_pt_regs) / sizeof(u64),
610 .align = sizeof(u64),
615 .core_note_type = NT_PRFPREG,
616 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
618 * We pretend we have 32-bit registers because the fpsr and
619 * fpcr are 32-bits wide.
622 .align = sizeof(u32),
627 .core_note_type = NT_ARM_TLS,
629 .size = sizeof(void *),
630 .align = sizeof(void *),
634 #ifdef CONFIG_HAVE_HW_BREAKPOINT
635 [REGSET_HW_BREAK] = {
636 .core_note_type = NT_ARM_HW_BREAK,
637 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
639 .align = sizeof(u32),
643 [REGSET_HW_WATCH] = {
644 .core_note_type = NT_ARM_HW_WATCH,
645 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
647 .align = sizeof(u32),
652 [REGSET_SYSTEM_CALL] = {
653 .core_note_type = NT_ARM_SYSTEM_CALL,
656 .align = sizeof(int),
657 .get = system_call_get,
658 .set = system_call_set,
662 static const struct user_regset_view user_aarch64_view = {
663 .name = "aarch64", .e_machine = EM_AARCH64,
664 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
668 #include <linux/compat.h>
675 static int compat_gpr_get(struct task_struct *target,
676 const struct user_regset *regset,
677 unsigned int pos, unsigned int count,
678 void *kbuf, void __user *ubuf)
681 unsigned int i, start, num_regs;
683 /* Calculate the number of AArch32 registers contained in count */
684 num_regs = count / regset->size;
686 /* Convert pos into an register number */
687 start = pos / regset->size;
689 if (start + num_regs > regset->n)
692 for (i = 0; i < num_regs; ++i) {
693 unsigned int idx = start + i;
698 reg = task_pt_regs(target)->pc;
701 reg = task_pt_regs(target)->pstate;
704 reg = task_pt_regs(target)->orig_x0;
707 reg = task_pt_regs(target)->regs[idx];
711 memcpy(kbuf, ®, sizeof(reg));
714 ret = copy_to_user(ubuf, ®, sizeof(reg));
727 static int compat_gpr_set(struct task_struct *target,
728 const struct user_regset *regset,
729 unsigned int pos, unsigned int count,
730 const void *kbuf, const void __user *ubuf)
732 struct pt_regs newregs;
734 unsigned int i, start, num_regs;
736 /* Calculate the number of AArch32 registers contained in count */
737 num_regs = count / regset->size;
739 /* Convert pos into an register number */
740 start = pos / regset->size;
742 if (start + num_regs > regset->n)
745 newregs = *task_pt_regs(target);
747 for (i = 0; i < num_regs; ++i) {
748 unsigned int idx = start + i;
752 memcpy(®, kbuf, sizeof(reg));
755 ret = copy_from_user(®, ubuf, sizeof(reg));
769 newregs.pstate = reg;
772 newregs.orig_x0 = reg;
775 newregs.regs[idx] = reg;
780 if (valid_user_regs(&newregs.user_regs, target))
781 *task_pt_regs(target) = newregs;
788 static int compat_vfp_get(struct task_struct *target,
789 const struct user_regset *regset,
790 unsigned int pos, unsigned int count,
791 void *kbuf, void __user *ubuf)
793 struct user_fpsimd_state *uregs;
794 compat_ulong_t fpscr;
797 uregs = &target->thread.fpsimd_state.user_fpsimd;
800 * The VFP registers are packed into the fpsimd_state, so they all sit
801 * nicely together for us. We just need to create the fpscr separately.
803 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
804 VFP_STATE_SIZE - sizeof(compat_ulong_t));
807 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
808 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
809 ret = put_user(fpscr, (compat_ulong_t *)ubuf);
815 static int compat_vfp_set(struct task_struct *target,
816 const struct user_regset *regset,
817 unsigned int pos, unsigned int count,
818 const void *kbuf, const void __user *ubuf)
820 struct user_fpsimd_state *uregs;
821 compat_ulong_t fpscr;
824 if (pos + count > VFP_STATE_SIZE)
827 uregs = &target->thread.fpsimd_state.user_fpsimd;
829 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
830 VFP_STATE_SIZE - sizeof(compat_ulong_t));
833 ret = get_user(fpscr, (compat_ulong_t *)ubuf);
834 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
835 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
838 fpsimd_flush_task_state(target);
842 static int compat_tls_get(struct task_struct *target,
843 const struct user_regset *regset, unsigned int pos,
844 unsigned int count, void *kbuf, void __user *ubuf)
846 compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
847 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
850 static int compat_tls_set(struct task_struct *target,
851 const struct user_regset *regset, unsigned int pos,
852 unsigned int count, const void *kbuf,
853 const void __user *ubuf)
856 compat_ulong_t tls = target->thread.tp_value;
858 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
862 target->thread.tp_value = tls;
866 static const struct user_regset aarch32_regsets[] = {
867 [REGSET_COMPAT_GPR] = {
868 .core_note_type = NT_PRSTATUS,
869 .n = COMPAT_ELF_NGREG,
870 .size = sizeof(compat_elf_greg_t),
871 .align = sizeof(compat_elf_greg_t),
872 .get = compat_gpr_get,
873 .set = compat_gpr_set
875 [REGSET_COMPAT_VFP] = {
876 .core_note_type = NT_ARM_VFP,
877 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
878 .size = sizeof(compat_ulong_t),
879 .align = sizeof(compat_ulong_t),
880 .get = compat_vfp_get,
881 .set = compat_vfp_set
885 static const struct user_regset_view user_aarch32_view = {
886 .name = "aarch32", .e_machine = EM_ARM,
887 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
890 static const struct user_regset aarch32_ptrace_regsets[] = {
892 .core_note_type = NT_PRSTATUS,
893 .n = COMPAT_ELF_NGREG,
894 .size = sizeof(compat_elf_greg_t),
895 .align = sizeof(compat_elf_greg_t),
896 .get = compat_gpr_get,
897 .set = compat_gpr_set
900 .core_note_type = NT_ARM_VFP,
901 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
902 .size = sizeof(compat_ulong_t),
903 .align = sizeof(compat_ulong_t),
904 .get = compat_vfp_get,
905 .set = compat_vfp_set
908 .core_note_type = NT_ARM_TLS,
910 .size = sizeof(compat_ulong_t),
911 .align = sizeof(compat_ulong_t),
912 .get = compat_tls_get,
913 .set = compat_tls_set,
915 #ifdef CONFIG_HAVE_HW_BREAKPOINT
916 [REGSET_HW_BREAK] = {
917 .core_note_type = NT_ARM_HW_BREAK,
918 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
920 .align = sizeof(u32),
924 [REGSET_HW_WATCH] = {
925 .core_note_type = NT_ARM_HW_WATCH,
926 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
928 .align = sizeof(u32),
933 [REGSET_SYSTEM_CALL] = {
934 .core_note_type = NT_ARM_SYSTEM_CALL,
937 .align = sizeof(int),
938 .get = system_call_get,
939 .set = system_call_set,
943 static const struct user_regset_view user_aarch32_ptrace_view = {
944 .name = "aarch32", .e_machine = EM_ARM,
945 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
948 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
949 compat_ulong_t __user *ret)
956 if (off == COMPAT_PT_TEXT_ADDR)
957 tmp = tsk->mm->start_code;
958 else if (off == COMPAT_PT_DATA_ADDR)
959 tmp = tsk->mm->start_data;
960 else if (off == COMPAT_PT_TEXT_END_ADDR)
961 tmp = tsk->mm->end_code;
962 else if (off < sizeof(compat_elf_gregset_t))
963 return copy_regset_to_user(tsk, &user_aarch32_view,
964 REGSET_COMPAT_GPR, off,
965 sizeof(compat_ulong_t), ret);
966 else if (off >= COMPAT_USER_SZ)
971 return put_user(tmp, ret);
974 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
978 mm_segment_t old_fs = get_fs();
980 if (off & 3 || off >= COMPAT_USER_SZ)
983 if (off >= sizeof(compat_elf_gregset_t))
987 ret = copy_regset_from_user(tsk, &user_aarch32_view,
988 REGSET_COMPAT_GPR, off,
989 sizeof(compat_ulong_t),
996 #ifdef CONFIG_HAVE_HW_BREAKPOINT
999 * Convert a virtual register number into an index for a thread_info
1000 * breakpoint array. Breakpoints are identified using positive numbers
1001 * whilst watchpoints are negative. The registers are laid out as pairs
1002 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1003 * Register 0 is reserved for describing resource information.
1005 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1007 return (abs(num) - 1) >> 1;
1010 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1012 u8 num_brps, num_wrps, debug_arch, wp_len;
1015 num_brps = hw_breakpoint_slots(TYPE_INST);
1016 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1018 debug_arch = debug_monitors_arch();
1032 static int compat_ptrace_hbp_get(unsigned int note_type,
1033 struct task_struct *tsk,
1040 int err, idx = compat_ptrace_hbp_num_to_idx(num);;
1043 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1046 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1053 static int compat_ptrace_hbp_set(unsigned int note_type,
1054 struct task_struct *tsk,
1061 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1065 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1068 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1074 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1075 compat_ulong_t __user *data)
1079 mm_segment_t old_fs = get_fs();
1084 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1086 } else if (num == 0) {
1087 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1090 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1095 ret = put_user(kdata, data);
1100 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1101 compat_ulong_t __user *data)
1105 mm_segment_t old_fs = get_fs();
1110 ret = get_user(kdata, data);
1116 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1118 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1123 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1125 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1126 compat_ulong_t caddr, compat_ulong_t cdata)
1128 unsigned long addr = caddr;
1129 unsigned long data = cdata;
1130 void __user *datap = compat_ptr(data);
1134 case PTRACE_PEEKUSR:
1135 ret = compat_ptrace_read_user(child, addr, datap);
1138 case PTRACE_POKEUSR:
1139 ret = compat_ptrace_write_user(child, addr, data);
1142 case COMPAT_PTRACE_GETREGS:
1143 ret = copy_regset_to_user(child,
1146 0, sizeof(compat_elf_gregset_t),
1150 case COMPAT_PTRACE_SETREGS:
1151 ret = copy_regset_from_user(child,
1154 0, sizeof(compat_elf_gregset_t),
1158 case COMPAT_PTRACE_GET_THREAD_AREA:
1159 ret = put_user((compat_ulong_t)child->thread.tp_value,
1160 (compat_ulong_t __user *)datap);
1163 case COMPAT_PTRACE_SET_SYSCALL:
1164 task_pt_regs(child)->syscallno = data;
1168 case COMPAT_PTRACE_GETVFPREGS:
1169 ret = copy_regset_to_user(child,
1176 case COMPAT_PTRACE_SETVFPREGS:
1177 ret = copy_regset_from_user(child,
1184 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1185 case COMPAT_PTRACE_GETHBPREGS:
1186 ret = compat_ptrace_gethbpregs(child, addr, datap);
1189 case COMPAT_PTRACE_SETHBPREGS:
1190 ret = compat_ptrace_sethbpregs(child, addr, datap);
1195 ret = compat_ptrace_request(child, request, addr,
1202 #endif /* CONFIG_COMPAT */
1204 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1206 #ifdef CONFIG_COMPAT
1208 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1209 * user_aarch32_view compatible with arm32. Native ptrace requests on
1210 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1211 * access to the TLS register.
1213 if (is_compat_task())
1214 return &user_aarch32_view;
1215 else if (is_compat_thread(task_thread_info(task)))
1216 return &user_aarch32_ptrace_view;
1218 return &user_aarch64_view;
1221 long arch_ptrace(struct task_struct *child, long request,
1222 unsigned long addr, unsigned long data)
1224 return ptrace_request(child, request, addr, data);
1227 enum ptrace_syscall_dir {
1228 PTRACE_SYSCALL_ENTER = 0,
1229 PTRACE_SYSCALL_EXIT,
1232 static void tracehook_report_syscall(struct pt_regs *regs,
1233 enum ptrace_syscall_dir dir)
1236 unsigned long saved_reg;
1239 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
1240 * used to denote syscall entry/exit:
1242 regno = (is_compat_task() ? 12 : 7);
1243 saved_reg = regs->regs[regno];
1244 regs->regs[regno] = dir;
1246 if (dir == PTRACE_SYSCALL_EXIT)
1247 tracehook_report_syscall_exit(regs, 0);
1248 else if (tracehook_report_syscall_entry(regs))
1249 regs->syscallno = ~0UL;
1251 regs->regs[regno] = saved_reg;
1254 asmlinkage int syscall_trace_enter(struct pt_regs *regs)
1256 /* Do the secure computing check first; failures should be fast. */
1257 if (secure_computing() == -1)
1260 if (test_thread_flag(TIF_SYSCALL_TRACE))
1261 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
1263 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1264 trace_sys_enter(regs, regs->syscallno);
1266 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1267 regs->regs[2], regs->regs[3]);
1269 return regs->syscallno;
1272 asmlinkage void syscall_trace_exit(struct pt_regs *regs)
1274 audit_syscall_exit(regs);
1276 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1277 trace_sys_exit(regs, regs_return_value(regs));
1279 if (test_thread_flag(TIF_SYSCALL_TRACE))
1280 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1284 * Bits which are always architecturally RES0 per ARM DDI 0487A.h
1285 * Userspace cannot use these until they have an architectural meaning.
1286 * We also reserve IL for the kernel; SS is handled dynamically.
1288 #define SPSR_EL1_AARCH64_RES0_BITS \
1289 (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \
1291 #define SPSR_EL1_AARCH32_RES0_BITS \
1292 (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20))
1294 static int valid_compat_regs(struct user_pt_regs *regs)
1296 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1298 if (!system_supports_mixed_endian_el0()) {
1299 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1300 regs->pstate |= COMPAT_PSR_E_BIT;
1302 regs->pstate &= ~COMPAT_PSR_E_BIT;
1305 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1306 (regs->pstate & COMPAT_PSR_A_BIT) == 0 &&
1307 (regs->pstate & COMPAT_PSR_I_BIT) == 0 &&
1308 (regs->pstate & COMPAT_PSR_F_BIT) == 0) {
1313 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1316 regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT |
1317 COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT |
1318 COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK |
1319 COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT |
1321 regs->pstate |= PSR_MODE32_BIT;
1326 static int valid_native_regs(struct user_pt_regs *regs)
1328 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1330 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1331 (regs->pstate & PSR_D_BIT) == 0 &&
1332 (regs->pstate & PSR_A_BIT) == 0 &&
1333 (regs->pstate & PSR_I_BIT) == 0 &&
1334 (regs->pstate & PSR_F_BIT) == 0) {
1338 /* Force PSR to a valid 64-bit EL0t */
1339 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1345 * Are the current registers suitable for user mode? (used to maintain
1346 * security in signal handlers)
1348 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1350 if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
1351 regs->pstate &= ~DBG_SPSR_SS;
1353 if (is_compat_thread(task_thread_info(task)))
1354 return valid_compat_regs(regs);
1356 return valid_native_regs(regs);