2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
13 #include "skeleton.dtsi"
16 compatible = "ti,omap4430", "ti,omap4";
17 interrupt-parent = <&wakeupgen>;
35 compatible = "arm,cortex-a9";
37 next-level-cache = <&L2>;
40 clocks = <&dpll_mpu_ck>;
43 clock-latency = <300000>; /* From omap-cpufreq driver */
46 compatible = "arm,cortex-a9";
48 next-level-cache = <&L2>;
53 gic: interrupt-controller@48241000 {
54 compatible = "arm,cortex-a9-gic";
56 #interrupt-cells = <3>;
57 reg = <0x48241000 0x1000>,
59 interrupt-parent = <&gic>;
62 L2: l2-cache-controller@48242000 {
63 compatible = "arm,pl310-cache";
64 reg = <0x48242000 0x1000>;
69 local-timer@48240600 {
70 compatible = "arm,cortex-a9-twd-timer";
71 clocks = <&mpu_periphclk>;
72 reg = <0x48240600 0x20>;
73 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
74 interrupt-parent = <&gic>;
77 wakeupgen: interrupt-controller@48281000 {
78 compatible = "ti,omap4-wugen-mpu";
80 #interrupt-cells = <3>;
81 reg = <0x48281000 0x1000>;
82 interrupt-parent = <&gic>;
86 * The soc node represents the soc top level view. It is used for IPs
87 * that are not memory mapped in the MPU view or for the MPU itself.
90 compatible = "ti,omap-infra";
92 compatible = "ti,omap4-mpu";
98 compatible = "ti,omap3-c64";
103 compatible = "ti,ivahd";
109 * XXX: Use a flat representation of the OMAP4 interconnect.
110 * The real OMAP interconnect network is quite complex.
111 * Since it will not bring real advantage to represent that in DT for
112 * the moment, just use a fake OCP bus entry to represent the whole bus
116 compatible = "ti,omap4-l3-noc", "simple-bus";
117 #address-cells = <1>;
120 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
121 reg = <0x44000000 0x1000>,
124 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
125 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
127 l4_cfg: l4@4a000000 {
128 compatible = "ti,omap4-l4-cfg", "simple-bus";
129 #address-cells = <1>;
131 ranges = <0 0x4a000000 0x1000000>;
134 compatible = "ti,omap4-cm1";
135 reg = <0x4000 0x2000>;
138 #address-cells = <1>;
142 cm1_clockdomains: clockdomains {
147 compatible = "ti,omap4-cm2";
148 reg = <0x8000 0x3000>;
151 #address-cells = <1>;
155 cm2_clockdomains: clockdomains {
159 omap4_scm_core: scm@2000 {
160 compatible = "ti,omap4-scm-core", "simple-bus";
161 reg = <0x2000 0x1000>;
162 #address-cells = <1>;
164 ranges = <0 0x2000 0x1000>;
166 scm_conf: scm_conf@0 {
167 compatible = "syscon";
169 #address-cells = <1>;
174 omap4_padconf_core: scm@100000 {
175 compatible = "ti,omap4-scm-padconf-core",
177 #address-cells = <1>;
179 ranges = <0 0x100000 0x1000>;
181 omap4_pmx_core: pinmux@40 {
182 compatible = "ti,omap4-padconf",
185 #address-cells = <1>;
187 #interrupt-cells = <1>;
188 interrupt-controller;
189 pinctrl-single,register-width = <16>;
190 pinctrl-single,function-mask = <0x7fff>;
193 omap4_padconf_global: omap4_padconf_global@5a0 {
194 compatible = "syscon",
197 #address-cells = <1>;
200 pbias_regulator: pbias_regulator {
201 compatible = "ti,pbias-omap";
203 syscon = <&omap4_padconf_global>;
204 pbias_mmc_reg: pbias_mmc_omap4 {
205 regulator-name = "pbias_mmc_omap4";
206 regulator-min-microvolt = <1800000>;
207 regulator-max-microvolt = <3000000>;
214 compatible = "ti,omap4-l4-wkup", "simple-bus";
215 #address-cells = <1>;
217 ranges = <0 0x300000 0x40000>;
219 counter32k: counter@4000 {
220 compatible = "ti,omap-counter32k";
222 ti,hwmods = "counter_32k";
226 compatible = "ti,omap4-prm";
227 reg = <0x6000 0x3000>;
228 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
231 #address-cells = <1>;
235 prm_clockdomains: clockdomains {
240 compatible = "ti,omap4-scrm";
241 reg = <0xa000 0x2000>;
243 scrm_clocks: clocks {
244 #address-cells = <1>;
248 scrm_clockdomains: clockdomains {
252 omap4_pmx_wkup: pinmux@1e040 {
253 compatible = "ti,omap4-padconf",
255 reg = <0x1e040 0x0038>;
256 #address-cells = <1>;
258 #interrupt-cells = <1>;
259 interrupt-controller;
260 pinctrl-single,register-width = <16>;
261 pinctrl-single,function-mask = <0x7fff>;
266 ocmcram: ocmcram@40304000 {
267 compatible = "mmio-sram";
268 reg = <0x40304000 0xa000>; /* 40k */
271 sdma: dma-controller@4a056000 {
272 compatible = "ti,omap4430-sdma";
273 reg = <0x4a056000 0x1000>;
274 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
275 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
276 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
277 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
280 dma-requests = <127>;
283 gpio1: gpio@4a310000 {
284 compatible = "ti,omap4-gpio";
285 reg = <0x4a310000 0x200>;
286 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
291 interrupt-controller;
292 #interrupt-cells = <2>;
295 gpio2: gpio@48055000 {
296 compatible = "ti,omap4-gpio";
297 reg = <0x48055000 0x200>;
298 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
302 interrupt-controller;
303 #interrupt-cells = <2>;
306 gpio3: gpio@48057000 {
307 compatible = "ti,omap4-gpio";
308 reg = <0x48057000 0x200>;
309 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
313 interrupt-controller;
314 #interrupt-cells = <2>;
317 gpio4: gpio@48059000 {
318 compatible = "ti,omap4-gpio";
319 reg = <0x48059000 0x200>;
320 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
324 interrupt-controller;
325 #interrupt-cells = <2>;
328 gpio5: gpio@4805b000 {
329 compatible = "ti,omap4-gpio";
330 reg = <0x4805b000 0x200>;
331 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
335 interrupt-controller;
336 #interrupt-cells = <2>;
339 gpio6: gpio@4805d000 {
340 compatible = "ti,omap4-gpio";
341 reg = <0x4805d000 0x200>;
342 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
346 interrupt-controller;
347 #interrupt-cells = <2>;
350 gpmc: gpmc@50000000 {
351 compatible = "ti,omap4430-gpmc";
352 reg = <0x50000000 0x1000>;
353 #address-cells = <2>;
355 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
357 gpmc,num-waitpins = <4>;
360 clocks = <&l3_div_ck>;
364 uart1: serial@4806a000 {
365 compatible = "ti,omap4-uart";
366 reg = <0x4806a000 0x100>;
367 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
369 clock-frequency = <48000000>;
372 uart2: serial@4806c000 {
373 compatible = "ti,omap4-uart";
374 reg = <0x4806c000 0x100>;
375 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
377 clock-frequency = <48000000>;
380 uart3: serial@48020000 {
381 compatible = "ti,omap4-uart";
382 reg = <0x48020000 0x100>;
383 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
385 clock-frequency = <48000000>;
388 uart4: serial@4806e000 {
389 compatible = "ti,omap4-uart";
390 reg = <0x4806e000 0x100>;
391 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
393 clock-frequency = <48000000>;
396 hwspinlock: spinlock@4a0f6000 {
397 compatible = "ti,omap4-hwspinlock";
398 reg = <0x4a0f6000 0x1000>;
399 ti,hwmods = "spinlock";
404 compatible = "ti,omap4-i2c";
405 reg = <0x48070000 0x100>;
406 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
407 #address-cells = <1>;
413 compatible = "ti,omap4-i2c";
414 reg = <0x48072000 0x100>;
415 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
416 #address-cells = <1>;
422 compatible = "ti,omap4-i2c";
423 reg = <0x48060000 0x100>;
424 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
425 #address-cells = <1>;
431 compatible = "ti,omap4-i2c";
432 reg = <0x48350000 0x100>;
433 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
434 #address-cells = <1>;
439 mcspi1: spi@48098000 {
440 compatible = "ti,omap4-mcspi";
441 reg = <0x48098000 0x200>;
442 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
443 #address-cells = <1>;
445 ti,hwmods = "mcspi1";
455 dma-names = "tx0", "rx0", "tx1", "rx1",
456 "tx2", "rx2", "tx3", "rx3";
459 mcspi2: spi@4809a000 {
460 compatible = "ti,omap4-mcspi";
461 reg = <0x4809a000 0x200>;
462 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
463 #address-cells = <1>;
465 ti,hwmods = "mcspi2";
471 dma-names = "tx0", "rx0", "tx1", "rx1";
474 mcspi3: spi@480b8000 {
475 compatible = "ti,omap4-mcspi";
476 reg = <0x480b8000 0x200>;
477 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
478 #address-cells = <1>;
480 ti,hwmods = "mcspi3";
482 dmas = <&sdma 15>, <&sdma 16>;
483 dma-names = "tx0", "rx0";
486 mcspi4: spi@480ba000 {
487 compatible = "ti,omap4-mcspi";
488 reg = <0x480ba000 0x200>;
489 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
490 #address-cells = <1>;
492 ti,hwmods = "mcspi4";
494 dmas = <&sdma 70>, <&sdma 71>;
495 dma-names = "tx0", "rx0";
499 compatible = "ti,omap4-hsmmc";
500 reg = <0x4809c000 0x400>;
501 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
504 ti,needs-special-reset;
505 dmas = <&sdma 61>, <&sdma 62>;
506 dma-names = "tx", "rx";
507 pbias-supply = <&pbias_mmc_reg>;
511 compatible = "ti,omap4-hsmmc";
512 reg = <0x480b4000 0x400>;
513 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
515 ti,needs-special-reset;
516 dmas = <&sdma 47>, <&sdma 48>;
517 dma-names = "tx", "rx";
521 compatible = "ti,omap4-hsmmc";
522 reg = <0x480ad000 0x400>;
523 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
525 ti,needs-special-reset;
526 dmas = <&sdma 77>, <&sdma 78>;
527 dma-names = "tx", "rx";
531 compatible = "ti,omap4-hsmmc";
532 reg = <0x480d1000 0x400>;
533 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
535 ti,needs-special-reset;
536 dmas = <&sdma 57>, <&sdma 58>;
537 dma-names = "tx", "rx";
541 compatible = "ti,omap4-hsmmc";
542 reg = <0x480d5000 0x400>;
543 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
545 ti,needs-special-reset;
546 dmas = <&sdma 59>, <&sdma 60>;
547 dma-names = "tx", "rx";
550 mmu_dsp: mmu@4a066000 {
551 compatible = "ti,omap4-iommu";
552 reg = <0x4a066000 0x100>;
553 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
554 ti,hwmods = "mmu_dsp";
557 mmu_ipu: mmu@55082000 {
558 compatible = "ti,omap4-iommu";
559 reg = <0x55082000 0x100>;
560 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
561 ti,hwmods = "mmu_ipu";
562 ti,iommu-bus-err-back;
566 compatible = "ti,omap4-wdt", "ti,omap3-wdt";
567 reg = <0x4a314000 0x80>;
568 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
569 ti,hwmods = "wd_timer2";
572 mcpdm: mcpdm@40132000 {
573 compatible = "ti,omap4-mcpdm";
574 reg = <0x40132000 0x7f>, /* MPU private access */
575 <0x49032000 0x7f>; /* L3 Interconnect */
576 reg-names = "mpu", "dma";
577 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
581 dma-names = "up_link", "dn_link";
585 dmic: dmic@4012e000 {
586 compatible = "ti,omap4-dmic";
587 reg = <0x4012e000 0x7f>, /* MPU private access */
588 <0x4902e000 0x7f>; /* L3 Interconnect */
589 reg-names = "mpu", "dma";
590 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
593 dma-names = "up_link";
597 mcbsp1: mcbsp@40122000 {
598 compatible = "ti,omap4-mcbsp";
599 reg = <0x40122000 0xff>, /* MPU private access */
600 <0x49022000 0xff>; /* L3 Interconnect */
601 reg-names = "mpu", "dma";
602 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
603 interrupt-names = "common";
604 ti,buffer-size = <128>;
605 ti,hwmods = "mcbsp1";
608 dma-names = "tx", "rx";
612 mcbsp2: mcbsp@40124000 {
613 compatible = "ti,omap4-mcbsp";
614 reg = <0x40124000 0xff>, /* MPU private access */
615 <0x49024000 0xff>; /* L3 Interconnect */
616 reg-names = "mpu", "dma";
617 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
618 interrupt-names = "common";
619 ti,buffer-size = <128>;
620 ti,hwmods = "mcbsp2";
623 dma-names = "tx", "rx";
627 mcbsp3: mcbsp@40126000 {
628 compatible = "ti,omap4-mcbsp";
629 reg = <0x40126000 0xff>, /* MPU private access */
630 <0x49026000 0xff>; /* L3 Interconnect */
631 reg-names = "mpu", "dma";
632 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
633 interrupt-names = "common";
634 ti,buffer-size = <128>;
635 ti,hwmods = "mcbsp3";
638 dma-names = "tx", "rx";
642 mcbsp4: mcbsp@48096000 {
643 compatible = "ti,omap4-mcbsp";
644 reg = <0x48096000 0xff>; /* L4 Interconnect */
646 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
647 interrupt-names = "common";
648 ti,buffer-size = <128>;
649 ti,hwmods = "mcbsp4";
652 dma-names = "tx", "rx";
656 keypad: keypad@4a31c000 {
657 compatible = "ti,omap4-keypad";
658 reg = <0x4a31c000 0x80>;
659 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
665 compatible = "ti,omap4-dmm";
666 reg = <0x4e000000 0x800>;
667 interrupts = <0 113 0x4>;
671 emif1: emif@4c000000 {
672 compatible = "ti,emif-4d";
673 reg = <0x4c000000 0x100>;
674 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
678 hw-caps-read-idle-ctrl;
679 hw-caps-ll-interface;
683 emif2: emif@4d000000 {
684 compatible = "ti,emif-4d";
685 reg = <0x4d000000 0x100>;
686 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
690 hw-caps-read-idle-ctrl;
691 hw-caps-ll-interface;
696 compatible = "ti,omap-ocp2scp";
697 reg = <0x4a0ad000 0x1f>;
698 #address-cells = <1>;
701 ti,hwmods = "ocp2scp_usb_phy";
702 usb2_phy: usb2phy@4a0ad080 {
703 compatible = "ti,omap-usb2";
704 reg = <0x4a0ad080 0x58>;
705 ctrl-module = <&omap_control_usb2phy>;
706 clocks = <&usb_phy_cm_clk32k>;
707 clock-names = "wkupclk";
712 mailbox: mailbox@4a0f4000 {
713 compatible = "ti,omap4-mailbox";
714 reg = <0x4a0f4000 0x200>;
715 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
716 ti,hwmods = "mailbox";
718 ti,mbox-num-users = <3>;
719 ti,mbox-num-fifos = <8>;
721 ti,mbox-tx = <0 0 0>;
722 ti,mbox-rx = <1 0 0>;
725 ti,mbox-tx = <3 0 0>;
726 ti,mbox-rx = <2 0 0>;
730 timer1: timer@4a318000 {
731 compatible = "ti,omap3430-timer";
732 reg = <0x4a318000 0x80>;
733 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
734 ti,hwmods = "timer1";
738 timer2: timer@48032000 {
739 compatible = "ti,omap3430-timer";
740 reg = <0x48032000 0x80>;
741 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
742 ti,hwmods = "timer2";
745 timer3: timer@48034000 {
746 compatible = "ti,omap4430-timer";
747 reg = <0x48034000 0x80>;
748 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
749 ti,hwmods = "timer3";
752 timer4: timer@48036000 {
753 compatible = "ti,omap4430-timer";
754 reg = <0x48036000 0x80>;
755 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
756 ti,hwmods = "timer4";
759 timer5: timer@40138000 {
760 compatible = "ti,omap4430-timer";
761 reg = <0x40138000 0x80>,
763 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
764 ti,hwmods = "timer5";
768 timer6: timer@4013a000 {
769 compatible = "ti,omap4430-timer";
770 reg = <0x4013a000 0x80>,
772 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
773 ti,hwmods = "timer6";
777 timer7: timer@4013c000 {
778 compatible = "ti,omap4430-timer";
779 reg = <0x4013c000 0x80>,
781 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
782 ti,hwmods = "timer7";
786 timer8: timer@4013e000 {
787 compatible = "ti,omap4430-timer";
788 reg = <0x4013e000 0x80>,
790 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
791 ti,hwmods = "timer8";
796 timer9: timer@4803e000 {
797 compatible = "ti,omap4430-timer";
798 reg = <0x4803e000 0x80>;
799 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
800 ti,hwmods = "timer9";
804 timer10: timer@48086000 {
805 compatible = "ti,omap3430-timer";
806 reg = <0x48086000 0x80>;
807 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
808 ti,hwmods = "timer10";
812 timer11: timer@48088000 {
813 compatible = "ti,omap4430-timer";
814 reg = <0x48088000 0x80>;
815 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
816 ti,hwmods = "timer11";
820 usbhstll: usbhstll@4a062000 {
821 compatible = "ti,usbhs-tll";
822 reg = <0x4a062000 0x1000>;
823 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
824 ti,hwmods = "usb_tll_hs";
827 usbhshost: usbhshost@4a064000 {
828 compatible = "ti,usbhs-host";
829 reg = <0x4a064000 0x800>;
830 ti,hwmods = "usb_host_hs";
831 #address-cells = <1>;
834 clocks = <&init_60m_fclk>,
837 clock-names = "refclk_60m_int",
841 usbhsohci: ohci@4a064800 {
842 compatible = "ti,ohci-omap3";
843 reg = <0x4a064800 0x400>;
844 interrupt-parent = <&gic>;
845 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
848 usbhsehci: ehci@4a064c00 {
849 compatible = "ti,ehci-omap";
850 reg = <0x4a064c00 0x400>;
851 interrupt-parent = <&gic>;
852 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
856 omap_control_usb2phy: control-phy@4a002300 {
857 compatible = "ti,control-phy-usb2";
858 reg = <0x4a002300 0x4>;
862 omap_control_usbotg: control-phy@4a00233c {
863 compatible = "ti,control-phy-otghs";
864 reg = <0x4a00233c 0x4>;
865 reg-names = "otghs_control";
868 usb_otg_hs: usb_otg_hs@4a0ab000 {
869 compatible = "ti,omap4-musb";
870 reg = <0x4a0ab000 0x7ff>;
871 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
872 interrupt-names = "mc", "dma";
873 ti,hwmods = "usb_otg_hs";
874 usb-phy = <&usb2_phy>;
876 phy-names = "usb2-phy";
880 ctrl-module = <&omap_control_usbotg>;
884 compatible = "ti,omap4-aes";
886 reg = <0x4b501000 0xa0>;
887 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
888 dmas = <&sdma 111>, <&sdma 110>;
889 dma-names = "tx", "rx";
893 compatible = "ti,omap4-des";
895 reg = <0x480a5000 0xa0>;
896 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
897 dmas = <&sdma 117>, <&sdma 116>;
898 dma-names = "tx", "rx";
901 abb_mpu: regulator-abb-mpu {
902 compatible = "ti,abb-v2";
903 regulator-name = "abb_mpu";
904 #address-cells = <0>;
906 ti,tranxdone-status-mask = <0x80>;
907 clocks = <&sys_clkin_ck>;
908 ti,settling-time = <50>;
909 ti,clock-cycles = <16>;
914 abb_iva: regulator-abb-iva {
915 compatible = "ti,abb-v2";
916 regulator-name = "abb_iva";
917 #address-cells = <0>;
919 ti,tranxdone-status-mask = <0x80000000>;
920 clocks = <&sys_clkin_ck>;
921 ti,settling-time = <50>;
922 ti,clock-cycles = <16>;
928 compatible = "ti,omap4-dss";
929 reg = <0x58000000 0x80>;
931 ti,hwmods = "dss_core";
932 clocks = <&dss_dss_clk>;
934 #address-cells = <1>;
939 compatible = "ti,omap4-dispc";
940 reg = <0x58001000 0x1000>;
941 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
942 ti,hwmods = "dss_dispc";
943 clocks = <&dss_dss_clk>;
947 rfbi: encoder@58002000 {
948 compatible = "ti,omap4-rfbi";
949 reg = <0x58002000 0x1000>;
951 ti,hwmods = "dss_rfbi";
952 clocks = <&dss_dss_clk>, <&l3_div_ck>;
953 clock-names = "fck", "ick";
956 venc: encoder@58003000 {
957 compatible = "ti,omap4-venc";
958 reg = <0x58003000 0x1000>;
960 ti,hwmods = "dss_venc";
961 clocks = <&dss_tv_clk>;
965 dsi1: encoder@58004000 {
966 compatible = "ti,omap4-dsi";
967 reg = <0x58004000 0x200>,
970 reg-names = "proto", "phy", "pll";
971 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
973 ti,hwmods = "dss_dsi1";
974 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
975 clock-names = "fck", "sys_clk";
978 dsi2: encoder@58005000 {
979 compatible = "ti,omap4-dsi";
980 reg = <0x58005000 0x200>,
983 reg-names = "proto", "phy", "pll";
984 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
986 ti,hwmods = "dss_dsi2";
987 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
988 clock-names = "fck", "sys_clk";
991 hdmi: encoder@58006000 {
992 compatible = "ti,omap4-hdmi";
993 reg = <0x58006000 0x200>,
997 reg-names = "wp", "pll", "phy", "core";
998 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1000 ti,hwmods = "dss_hdmi";
1001 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1002 clock-names = "fck", "sys_clk";
1004 dma-names = "audio_tx";
1010 /include/ "omap44xx-clocks.dtsi"