2 * comedi/drivers/cb_pcimdas.c
3 * Comedi driver for Computer Boards PCIM-DAS1602/16 and PCIe-DAS1602/16
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
21 * Description: Measurement Computing PCI Migration series boards
22 * Devices: [ComputerBoards] PCIM-DAS1602/16 (cb_pcimdas), PCIe-DAS1602/16
23 * Author: Richard Bytheway
24 * Updated: Mon, 13 Oct 2014 11:57:39 +0000
25 * Status: experimental
27 * Written to support the PCIM-DAS1602/16 and PCIe-DAS1602/16.
29 * Configuration Options:
32 * Manual configuration of PCI(e) cards is not supported; they are configured
35 * Developed from cb_pcidas and skel by Richard Bytheway (mocelet@sucs.org).
36 * Only supports DIO, AO and simple AI in it's present form.
37 * No interrupts, multi channel or FIFO AI,
38 * although the card looks like it could support this.
40 * http://www.mccdaq.com/PDFs/Manuals/pcim-das1602-16.pdf
41 * http://www.mccdaq.com/PDFs/Manuals/pcie-das1602-16.pdf
44 #include <linux/module.h>
45 #include <linux/interrupt.h>
47 #include "../comedi_pci.h"
49 #include "comedi_8254.h"
54 * PCI Bar 1 Register map
55 * see plx9052.h for register and bit defines
59 * PCI Bar 2 Register map (devpriv->daqio)
61 #define PCIMDAS_AI_REG 0x00
62 #define PCIMDAS_AI_SOFTTRIG_REG 0x00
63 #define PCIMDAS_AO_REG(x) (0x02 + ((x) * 2))
66 * PCI Bar 3 Register map (devpriv->BADR3)
68 #define PCIMDAS_MUX_REG 0x00
69 #define PCIMDAS_MUX(_lo, _hi) ((_lo) | ((_hi) << 4))
70 #define PCIMDAS_DI_DO_REG 0x01
71 #define PCIMDAS_STATUS_REG 0x02
72 #define PCIMDAS_STATUS_EOC BIT(7)
73 #define PCIMDAS_STATUS_UB BIT(6)
74 #define PCIMDAS_STATUS_MUX BIT(5)
75 #define PCIMDAS_STATUS_CLK BIT(4)
76 #define PCIMDAS_STATUS_TO_CURR_MUX(x) ((x) & 0xf)
77 #define PCIMDAS_CONV_STATUS_REG 0x03
78 #define PCIMDAS_CONV_STATUS_EOC BIT(7)
79 #define PCIMDAS_CONV_STATUS_EOB BIT(6)
80 #define PCIMDAS_CONV_STATUS_EOA BIT(5)
81 #define PCIMDAS_CONV_STATUS_FNE BIT(4)
82 #define PCIMDAS_CONV_STATUS_FHF BIT(3)
83 #define PCIMDAS_CONV_STATUS_OVERRUN BIT(2)
84 #define PCIMDAS_IRQ_REG 0x04
85 #define PCIMDAS_IRQ_INTE BIT(7)
86 #define PCIMDAS_IRQ_INT BIT(6)
87 #define PCIMDAS_IRQ_OVERRUN BIT(4)
88 #define PCIMDAS_IRQ_EOA BIT(3)
89 #define PCIMDAS_IRQ_EOA_INT_SEL BIT(2)
90 #define PCIMDAS_IRQ_INTSEL(x) ((x) << 0)
91 #define PCIMDAS_IRQ_INTSEL_EOC PCIMDAS_IRQ_INTSEL(0)
92 #define PCIMDAS_IRQ_INTSEL_FNE PCIMDAS_IRQ_INTSEL(1)
93 #define PCIMDAS_IRQ_INTSEL_EOB PCIMDAS_IRQ_INTSEL(2)
94 #define PCIMDAS_IRQ_INTSEL_FHF_EOA PCIMDAS_IRQ_INTSEL(3)
95 #define PCIMDAS_PACER_REG 0x05
96 #define PCIMDAS_PACER_GATE_STATUS BIT(6)
97 #define PCIMDAS_PACER_GATE_POL BIT(5)
98 #define PCIMDAS_PACER_GATE_LATCH BIT(4)
99 #define PCIMDAS_PACER_GATE_EN BIT(3)
100 #define PCIMDAS_PACER_EXT_PACER_POL BIT(2)
101 #define PCIMDAS_PACER_SRC(x) ((x) << 0)
102 #define PCIMDAS_PACER_SRC_POLLED PCIMDAS_PACER_SRC(0)
103 #define PCIMDAS_PACER_SRC_EXT PCIMDAS_PACER_SRC(2)
104 #define PCIMDAS_PACER_SRC_INT PCIMDAS_PACER_SRC(3)
105 #define PCIMDAS_PACER_SRC_MASK (3 << 0)
106 #define PCIMDAS_BURST_REG 0x06
107 #define PCIMDAS_BURST_BME BIT(1)
108 #define PCIMDAS_BURST_CONV_EN BIT(0)
109 #define PCIMDAS_GAIN_REG 0x07
110 #define PCIMDAS_8254_BASE 0x08
111 #define PCIMDAS_USER_CNTR_REG 0x0c
112 #define PCIMDAS_USER_CNTR_CTR1_CLK_SEL BIT(0)
113 #define PCIMDAS_RESIDUE_MSB_REG 0x0d
114 #define PCIMDAS_RESIDUE_LSB_REG 0x0e
117 * PCI Bar 4 Register map (dev->iobase)
119 #define PCIMDAS_8255_BASE 0x00
121 static const struct comedi_lrange cb_pcimdas_ai_bip_range = {
130 static const struct comedi_lrange cb_pcimdas_ai_uni_range = {
140 * The Analog Output range is not programmable. The DAC ranges are
141 * jumper-settable on the board. The settings are not software-readable.
143 static const struct comedi_lrange cb_pcimdas_ao_range = {
153 * this structure is for data unique to this hardware driver. If
154 * several hardware drivers keep similar information in this structure,
155 * feel free to suggest moving the variable to the struct comedi_device
158 struct cb_pcimdas_private {
164 static int cb_pcimdas_ai_eoc(struct comedi_device *dev,
165 struct comedi_subdevice *s,
166 struct comedi_insn *insn,
167 unsigned long context)
169 struct cb_pcimdas_private *devpriv = dev->private;
172 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
173 if ((status & PCIMDAS_STATUS_EOC) == 0)
178 static int cb_pcimdas_ai_insn_read(struct comedi_device *dev,
179 struct comedi_subdevice *s,
180 struct comedi_insn *insn,
183 struct cb_pcimdas_private *devpriv = dev->private;
184 unsigned int chan = CR_CHAN(insn->chanspec);
185 unsigned int range = CR_RANGE(insn->chanspec);
190 /* only support sw initiated reads from a single channel */
192 /* configure for sw initiated read */
193 d = inb(devpriv->BADR3 + PCIMDAS_PACER_REG);
194 if ((d & PCIMDAS_PACER_SRC_MASK) != PCIMDAS_PACER_SRC_POLLED) {
195 d &= ~PCIMDAS_PACER_SRC_MASK;
196 d |= PCIMDAS_PACER_SRC_POLLED;
197 outb(d, devpriv->BADR3 + PCIMDAS_PACER_REG);
200 /* set bursting off, conversions on */
201 outb(PCIMDAS_BURST_CONV_EN, devpriv->BADR3 + PCIMDAS_BURST_REG);
204 outb(range, devpriv->BADR3 + PCIMDAS_GAIN_REG);
206 /* set mux for single channel scan */
207 outb(PCIMDAS_MUX(chan, chan), devpriv->BADR3 + PCIMDAS_MUX_REG);
209 /* convert n samples */
210 for (n = 0; n < insn->n; n++) {
211 /* trigger conversion */
212 outw(0, devpriv->daqio + PCIMDAS_AI_SOFTTRIG_REG);
214 /* wait for conversion to end */
215 ret = comedi_timeout(dev, s, insn, cb_pcimdas_ai_eoc, 0);
220 data[n] = inw(devpriv->daqio + PCIMDAS_AI_REG);
223 /* return the number of samples read/written */
227 static int cb_pcimdas_ao_insn_write(struct comedi_device *dev,
228 struct comedi_subdevice *s,
229 struct comedi_insn *insn,
232 struct cb_pcimdas_private *devpriv = dev->private;
233 unsigned int chan = CR_CHAN(insn->chanspec);
234 unsigned int val = s->readback[chan];
237 for (i = 0; i < insn->n; i++) {
239 outw(val, devpriv->daqio + PCIMDAS_AO_REG(chan));
241 s->readback[chan] = val;
246 static int cb_pcimdas_di_insn_bits(struct comedi_device *dev,
247 struct comedi_subdevice *s,
248 struct comedi_insn *insn,
251 struct cb_pcimdas_private *devpriv = dev->private;
254 val = inb(devpriv->BADR3 + PCIMDAS_DI_DO_REG);
256 data[1] = val & 0x0f;
261 static int cb_pcimdas_do_insn_bits(struct comedi_device *dev,
262 struct comedi_subdevice *s,
263 struct comedi_insn *insn,
266 struct cb_pcimdas_private *devpriv = dev->private;
268 if (comedi_dio_update_state(s, data))
269 outb(s->state, devpriv->BADR3 + PCIMDAS_DI_DO_REG);
276 static int cb_pcimdas_counter_insn_config(struct comedi_device *dev,
277 struct comedi_subdevice *s,
278 struct comedi_insn *insn,
281 struct cb_pcimdas_private *devpriv = dev->private;
285 case INSN_CONFIG_SET_CLOCK_SRC:
287 case 0: /* internal 100 kHz clock */
288 ctrl = PCIMDAS_USER_CNTR_CTR1_CLK_SEL;
290 case 1: /* external clk on pin 21 */
296 outb(ctrl, devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
298 case INSN_CONFIG_GET_CLOCK_SRC:
299 ctrl = inb(devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
300 if (ctrl & PCIMDAS_USER_CNTR_CTR1_CLK_SEL) {
302 data[2] = I8254_OSC_BASE_100KHZ;
315 static unsigned int cb_pcimdas_pacer_clk(struct comedi_device *dev)
317 struct cb_pcimdas_private *devpriv = dev->private;
320 /* The Pacer Clock jumper selects a 10 MHz or 1 MHz clock */
321 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
322 if (status & PCIMDAS_STATUS_CLK)
323 return I8254_OSC_BASE_10MHZ;
324 return I8254_OSC_BASE_1MHZ;
327 static bool cb_pcimdas_is_ai_se(struct comedi_device *dev)
329 struct cb_pcimdas_private *devpriv = dev->private;
333 * The number of Analog Input channels is set with the
334 * Analog Input Mode Switch on the board. The board can
335 * have 16 single-ended or 8 differential channels.
337 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
338 return status & PCIMDAS_STATUS_MUX;
341 static bool cb_pcimdas_is_ai_uni(struct comedi_device *dev)
343 struct cb_pcimdas_private *devpriv = dev->private;
347 * The Analog Input range polarity is set with the
348 * Analog Input Polarity Switch on the board. The
349 * inputs can be set to Unipolar or Bipolar ranges.
351 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
352 return status & PCIMDAS_STATUS_UB;
355 static int cb_pcimdas_auto_attach(struct comedi_device *dev,
356 unsigned long context_unused)
358 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
359 struct cb_pcimdas_private *devpriv;
360 struct comedi_subdevice *s;
363 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
367 ret = comedi_pci_enable(dev);
371 devpriv->daqio = pci_resource_start(pcidev, 2);
372 devpriv->BADR3 = pci_resource_start(pcidev, 3);
373 dev->iobase = pci_resource_start(pcidev, 4);
375 dev->pacer = comedi_8254_init(devpriv->BADR3 + PCIMDAS_8254_BASE,
376 cb_pcimdas_pacer_clk(dev),
381 ret = comedi_alloc_subdevices(dev, 6);
385 /* Analog Input subdevice */
386 s = &dev->subdevices[0];
387 s->type = COMEDI_SUBD_AI;
388 s->subdev_flags = SDF_READABLE;
389 if (cb_pcimdas_is_ai_se(dev)) {
390 s->subdev_flags |= SDF_GROUND;
393 s->subdev_flags |= SDF_DIFF;
397 s->range_table = cb_pcimdas_is_ai_uni(dev) ? &cb_pcimdas_ai_uni_range
398 : &cb_pcimdas_ai_bip_range;
399 s->insn_read = cb_pcimdas_ai_insn_read;
401 /* Analog Output subdevice */
402 s = &dev->subdevices[1];
403 s->type = COMEDI_SUBD_AO;
404 s->subdev_flags = SDF_WRITABLE;
407 s->range_table = &cb_pcimdas_ao_range;
408 s->insn_write = cb_pcimdas_ao_insn_write;
410 ret = comedi_alloc_subdev_readback(s);
414 /* Digital I/O subdevice */
415 s = &dev->subdevices[2];
416 ret = subdev_8255_init(dev, s, NULL, PCIMDAS_8255_BASE);
420 /* Digital Input subdevice (main connector) */
421 s = &dev->subdevices[3];
422 s->type = COMEDI_SUBD_DI;
423 s->subdev_flags = SDF_READABLE;
426 s->range_table = &range_digital;
427 s->insn_bits = cb_pcimdas_di_insn_bits;
429 /* Digital Output subdevice (main connector) */
430 s = &dev->subdevices[4];
431 s->type = COMEDI_SUBD_DO;
432 s->subdev_flags = SDF_WRITABLE;
435 s->range_table = &range_digital;
436 s->insn_bits = cb_pcimdas_do_insn_bits;
438 /* Counter subdevice (8254) */
439 s = &dev->subdevices[5];
440 comedi_8254_subdevice_init(s, dev->pacer);
442 dev->pacer->insn_config = cb_pcimdas_counter_insn_config;
444 /* counters 1 and 2 are used internally for the pacer */
445 comedi_8254_set_busy(dev->pacer, 1, true);
446 comedi_8254_set_busy(dev->pacer, 2, true);
451 static struct comedi_driver cb_pcimdas_driver = {
452 .driver_name = "cb_pcimdas",
453 .module = THIS_MODULE,
454 .auto_attach = cb_pcimdas_auto_attach,
455 .detach = comedi_pci_detach,
458 static int cb_pcimdas_pci_probe(struct pci_dev *dev,
459 const struct pci_device_id *id)
461 return comedi_pci_auto_config(dev, &cb_pcimdas_driver,
465 static const struct pci_device_id cb_pcimdas_pci_table[] = {
466 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0056) }, /* PCIM-DAS1602/16 */
467 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0115) }, /* PCIe-DAS1602/16 */
470 MODULE_DEVICE_TABLE(pci, cb_pcimdas_pci_table);
472 static struct pci_driver cb_pcimdas_pci_driver = {
473 .name = "cb_pcimdas",
474 .id_table = cb_pcimdas_pci_table,
475 .probe = cb_pcimdas_pci_probe,
476 .remove = comedi_pci_auto_unconfig,
478 module_comedi_pci_driver(cb_pcimdas_driver, cb_pcimdas_pci_driver);
480 MODULE_AUTHOR("Comedi http://www.comedi.org");
481 MODULE_DESCRIPTION("Comedi driver for PCIM-DAS1602/16 and PCIe-DAS1602/16");
482 MODULE_LICENSE("GPL");