2 // Copyright (c) 2010-2020 Intel Corporation
4 // Licensed under the Apache License, Version 2.0 (the "License");
5 // you may not use this file except in compliance with the License.
6 // You may obtain a copy of the License at
8 // http://www.apache.org/licenses/LICENSE-2.0
10 // Unless required by applicable law or agreed to in writing, software
11 // distributed under the License is distributed on an "AS IS" BASIS,
12 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 // See the License for the specific language governing permissions and
14 // limitations under the License.
19 #include <rte_sched.h>
20 #include <rte_ether.h>
21 #include <rte_version.h>
27 #include "prox_port_cfg.h"
30 #include "handle_master.h"
31 #include "prox_compat.h"
32 #include "prox_ipv6.h"
34 #define TEN_GIGABIT 1250000000
35 #define QUEUE_SIZES 128
36 #define NB_PIPES 32768
38 #define RING_RX_SIZE 256
39 #define NB_RX_RING_DESC 2048
40 #define NB_TX_RING_DESC 2048
42 /* 1500000 milliseconds */
43 #define DEFAULT_CPE_TIMEOUT_MS 1500000
46 #if DEFAULT_CPE_TIMEOUT_MS < (DRAIN_TIMEOUT/3000000)
47 #error DEFAULT_CPE_TIMEOUT_MS too small (needs to be at least 2 ms)
50 static const struct rte_eth_conf default_port_conf = {
53 #if RTE_VERSION < RTE_VERSION_NUM(21,11,0,0)
54 .max_rx_pkt_len = PROX_MTU + PROX_RTE_ETHER_HDR_LEN + PROX_RTE_ETHER_CRC_LEN,
65 .lsc = 1, /* lsc interrupt feature enabled */
69 static const struct rte_eth_rxconf default_rx_conf = {
73 static struct rte_eth_txconf default_tx_conf = {
79 .tx_free_thresh = 32, /* Use PMD default values */
80 .tx_rs_thresh = 32, /* Use PMD default values */
83 #if RTE_VERSION >= RTE_VERSION_NUM(20,11,0,0)
84 static struct rte_sched_subport_profile_params subport_profile_params_default = {
85 .tb_rate = TEN_GIGABIT / NB_PIPES,
88 .tc_rate = {TEN_GIGABIT / NB_PIPES, TEN_GIGABIT / NB_PIPES, TEN_GIGABIT / NB_PIPES, TEN_GIGABIT / NB_PIPES},
93 static struct rte_sched_port_params port_params_default = {
96 .mtu = 6 + 6 + 4 + 4 + 2 + 1500,
98 .frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT,
99 .n_subports_per_port = 1,
100 #if RTE_VERSION >= RTE_VERSION_NUM(20,11,0,0)
101 .subport_profiles = &subport_profile_params_default,
103 .n_pipes_per_subport = NB_PIPES,
104 #if RTE_VERSION < RTE_VERSION_NUM(19,11,0,0)
105 .qsize = {QUEUE_SIZES, QUEUE_SIZES, QUEUE_SIZES, QUEUE_SIZES},
106 .pipe_profiles = NULL,
107 .n_pipe_profiles = 1 /* only one profile */
111 static struct rte_sched_pipe_params pipe_params_default = {
112 .tb_rate = TEN_GIGABIT / NB_PIPES,
115 .tc_rate = {TEN_GIGABIT / NB_PIPES, TEN_GIGABIT / NB_PIPES, TEN_GIGABIT / NB_PIPES, TEN_GIGABIT / NB_PIPES},
118 #if RTE_VERSION >= RTE_VERSION_NUM(19,8,0,0)
119 .wrr_weights = {1, 1, 1, 1},
121 .wrr_weights = {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
125 static struct rte_sched_subport_params subport_params_default = {
126 #if RTE_VERSION < RTE_VERSION_NUM(20,11,0,0)
127 .tb_rate = TEN_GIGABIT,
129 .tc_rate = {TEN_GIGABIT, TEN_GIGABIT, TEN_GIGABIT, TEN_GIGABIT},
130 .tc_period = 40, /* default was 10 */
132 #if RTE_VERSION > RTE_VERSION_NUM(19,11,0,0)
133 .qsize = {QUEUE_SIZES, QUEUE_SIZES, QUEUE_SIZES, QUEUE_SIZES},
134 .pipe_profiles = NULL,
135 .n_pipe_profiles = 1 /* only one profile */
139 void set_global_defaults(struct prox_cfg *prox_cfg)
141 if (parse_ip6(&prox_cfg->all_routers_ipv6_mcast_addr, ALL_ROUTERS_IPV6_MCAST_ADDR) != 0)
142 plog_err("Failed to parse %s\n", ALL_ROUTERS_IPV6_MCAST_ADDR);
143 if (parse_ip6(&prox_cfg->all_nodes_ipv6_mcast_addr, ALL_NODES_IPV6_MCAST_ADDR) != 0)
144 plog_err("Failed to parse %s\n", ALL_NODES_IPV6_MCAST_ADDR);
145 if (parse_ip6(&prox_cfg->random_ip, RANDOM_IPV6) != 0)
146 plog_err("Failed to parse %s\n", RANDOM_IPV6);
147 set_mcast_mac_from_ipv6(&prox_cfg->all_routers_mac_addr, &prox_cfg->all_routers_ipv6_mcast_addr);
148 set_mcast_mac_from_ipv6(&prox_cfg->all_nodes_mac_addr, &prox_cfg->all_nodes_ipv6_mcast_addr);
151 void set_task_defaults(struct prox_cfg* prox_cfg, struct lcore_cfg* lcore_cfg_init)
153 prox_cfg->master = RTE_MAX_LCORE;
154 handle_ctrl_plane = NULL;
156 for (uint32_t i = 0; i < RTE_DIM(prox_cfg->cpe_table_ports); ++i) {
157 prox_cfg->cpe_table_ports[i] = -1;
160 for (uint8_t lcore_id = 0; lcore_id < RTE_MAX_LCORE; ++lcore_id) {
161 struct lcore_cfg *cur_lcore_cfg_init = &lcore_cfg_init[lcore_id];
162 cur_lcore_cfg_init->id = lcore_id;
163 for (uint8_t task_id = 0; task_id < MAX_TASKS_PER_CORE; ++task_id) {
164 struct task_args *targ = &cur_lcore_cfg_init->targs[task_id];
165 for (uint8_t port_id = 0; port_id < PROX_MAX_PORTS; ++port_id) {
166 targ->rx_port_queue[port_id].port = OUT_DISCARD;
168 targ->flags |= TASK_ARG_DROP;
169 targ->flags |= TASK_ARG_QINQ_ACL;
170 targ->cpe_table_timeout_ms = DEFAULT_CPE_TIMEOUT_MS;
171 targ->n_flows = NB_PIPES;
172 /* configure default values for QoS (can be overwritten by config) */
173 targ->qos_conf.port_params = port_params_default;
174 targ->qos_conf.pipe_params[0] = pipe_params_default;
175 targ->qos_conf.subport_params[0] = subport_params_default;
176 #if RTE_VERSION > RTE_VERSION_NUM(19,11,0,0)
177 targ->qos_conf.subport_params[0].pipe_profiles = targ->qos_conf.pipe_params;
179 targ->qos_conf.port_params.pipe_profiles = targ->qos_conf.pipe_params;
181 targ->qos_conf.port_params.rate = TEN_GIGABIT;
182 targ->qinq_tag = ETYPE_8021ad;
183 targ->n_concur_conn = 8192*2;
185 for (uint8_t port_id = 0; port_id < PROX_MAX_PORTS; ++port_id) {
186 targ->tx_port_queue[port_id].port = OUT_DISCARD;
189 for (uint8_t i = 0; i < PROX_MAX_PORTS; ++i) {
190 targ->mapping[i] = i; // identity
193 targ->cbs = PROX_RTE_ETHER_MAX_LEN;
194 targ->ebs = PROX_RTE_ETHER_MAX_LEN;
195 targ->pbs = PROX_RTE_ETHER_MAX_LEN;
197 targ->n_max_rules = 1024;
198 targ->ring_size = RING_RX_SIZE;
199 targ->nb_cache_mbuf = MAX_PKT_BURST * 4;
200 targ->overhead = PROX_RTE_ETHER_CRC_LEN + 20;
202 targ->tunnel_hop_limit = 3;
203 targ->ctrl_freq = 1000;
204 targ->lb_friend_core = 0xFF;
207 targ->runtime_flags |= TASK_TX_CRC;
208 targ->accuracy_limit_nsec = 5000;
209 targ->probability_delay = 1000000;
210 targ->probability_no_drop = 1000000;
215 void set_port_defaults(void)
217 for (uint8_t i = 0; i < PROX_MAX_PORTS; ++i ) {
218 prox_port_cfg[i].promiscuous = 1;
219 prox_port_cfg[i].nb_mc_addr = 0;
220 prox_port_cfg[i].n_rxd = NB_RX_RING_DESC;
221 prox_port_cfg[i].n_txd = NB_TX_RING_DESC;
222 prox_port_cfg[i].port_conf = default_port_conf;
223 prox_port_cfg[i].tx_conf = default_tx_conf;
224 prox_port_cfg[i].rx_conf = default_rx_conf;
225 prox_port_cfg[i].rx_ring[0] = '\0';
226 prox_port_cfg[i].tx_ring[0] = '\0';
227 prox_port_cfg[i].mtu = PROX_MTU;
228 prox_port_cfg[i].dpdk_mapping = NO_VDEV_PORT;
229 prox_port_cfg[i].v6_mask_length = 8;
231 // CRC_STRIP becoming the default behavior in DPDK 18.08, and
232 // DEV_RX_OFFLOAD_CRC_STRIP define has been deleted
233 #if defined (RTE_ETH_RX_OFFLOAD_CRC_STRIP)
234 prox_port_cfg[i].requested_rx_offload = RTE_ETH_RX_OFFLOAD_CRC_STRIP;
236 prox_port_cfg[i].requested_tx_offload = RTE_ETH_TX_OFFLOAD_IPV4_CKSUM | RTE_ETH_TX_OFFLOAD_UDP_CKSUM;